diff --git a/hdl/eb_slave_core/WB_bus_adapter_streaming_sg.vhd b/hdl/eb_slave_core/WB_bus_adapter_streaming_sg.vhd
index 89b4b1f06971733cdb5d050cafbd93934abbee2c..6a0a5fb39ef0b0d09d47999f352ba5e7f03b0879 100644
--- a/hdl/eb_slave_core/WB_bus_adapter_streaming_sg.vhd
+++ b/hdl/eb_slave_core/WB_bus_adapter_streaming_sg.vhd
@@ -109,7 +109,6 @@ architecture behavioral of WB_bus_adapter_streaming_sg is
signal piso_ld : std_logic;
signal piso_empty : std_logic;
signal piso_am_empty :std_logic;
- signal piso_full : std_logic;
signal ld : std_logic;
signal get_adr : std_logic;
@@ -180,6 +179,11 @@ A_LESSER_B: if(c_dat_w_min = g_dat_width_A) GENERATE
A_ERR_o <= B_ERR_i;
A_RTY_o <= B_RTY_i;
+ --FIXME
+ B_ADR_o <= (others => '0');
+ B_SEL_o <= (others => '0');
+
+
B_WE_o <= A_WE_i;
A_STALL_o <= '1' when sipo_full ='1' AND B_STALL_i = '1'
@@ -192,7 +196,7 @@ A_LESSER_B: if(c_dat_w_min = g_dat_width_A) GENERATE
else '0';
-
+ sipo_clr <= '0';
B_STB_o <= B_STB;
B_STB <= sipo_full AND NOT ALLRDY_STROBED;
@@ -207,7 +211,7 @@ A_LESSER_B: if(c_dat_w_min = g_dat_width_A) GENERATE
A_ACK_o <= '0';
ALLRDY_STROBED <= '0';
-
+
else
@@ -247,7 +251,7 @@ A_GREATER_B: if(c_dat_w_max = g_dat_width_A) GENERATE
ld_i => piso_ld,
q_o => piso_q,
- full_o => piso_full,
+ full_o => open,
almost_empty_o => piso_am_empty,
empty_o => piso_empty
);
@@ -258,6 +262,9 @@ A_GREATER_B: if(c_dat_w_max = g_dat_width_A) GENERATE
A_ERR_o <= B_ERR_i;
A_RTY_o <= B_RTY_i;
B_WE_o <= A_WE_i;
+ --FIXME
+ B_ADR_o <= (others => '0');
+ B_SEL_o <= (others => '0');
piso_ld <= '1' when A_CYC_i = '1' AND A_STB_i = '1' AND (piso_empty = '1' OR (piso_am_empty ='1' AND B_STALL_i = '0'))
else '0';
diff --git a/hdl/eb_slave_core/eb_config.vhd b/hdl/eb_slave_core/eb_config.vhd
index e4baf74a36ab8cacc62fd796cb4c87a6f7ab902c..d07eb069ce0ea5c513389b4e9e025664a30b861e 100644
--- a/hdl/eb_slave_core/eb_config.vhd
+++ b/hdl/eb_slave_core/eb_config.vhd
@@ -91,7 +91,8 @@ my_ip_o <= my_ip;
my_port_o <= my_port;
local_slave_o.STALL <= eb_slave_i.CYC;
-
+local_slave_o.INT <= '0';
+local_slave_o.RTY <= '0';
eb_if : process (clk_i)
@@ -111,7 +112,7 @@ eb_if : process (clk_i)
local_slave_o.ACK <= '0';
local_slave_o.ERR <= '0';
- local_slave_o.RTY <= '0';
+
local_slave_o.DAT <= (others => '0');
my_ip <= c_my_default_ip;
diff --git a/hdl/eb_slave_core/eb_main_fsm.vhd b/hdl/eb_slave_core/eb_main_fsm.vhd
index b4b9e1c1cec96dc1683311fdd1beaef06a83f0a1..2e4ff52d5b5ecccae5112575699bd6b1df30024f 100644
--- a/hdl/eb_slave_core/eb_main_fsm.vhd
+++ b/hdl/eb_slave_core/eb_main_fsm.vhd
@@ -98,13 +98,11 @@ signal s_config_master_o : t_wishbone_master_out;
signal s_WB_STB : std_logic;
signal s_WB_ADR : std_logic_vector(WB_master_o.ADR'left downto 0);
signal s_WB_SEL : std_logic_vector(WB_master_o.SEL'left downto 0);
-signal s_WB_CYC : std_logic;
+
signal s_WB_WE : std_logic;
signal s_TX_STROBED : std_logic;
signal s_WB_addr_inc : unsigned(c_EB_ADDR_SIZE_n-1 downto 0);
-signal s_WB_addr_cnt : unsigned(c_EB_ADDR_SIZE_n-1 downto 0);
-
------------------------------------------------------------------------------------------
-- Byte/Pulse Counters
------------------------------------------------------------------------------------------
@@ -134,7 +132,6 @@ signal s_ADR_CONFIG : std_logic;
--Etherbone Signals
------------------------------------------------------------------------------------------
signal s_EB_RX_ACK : std_logic;
-signal s_EB_RX_STALL : std_logic;
signal rx_stall : std_logic;
signal s_EB_TX_STB : std_logic;
@@ -159,23 +156,19 @@ signal s_EB_TX_CUR_CYCLE : EB_CYC;
------------------------------------------------------------------------------------------
signal s_fifo_tx_am_full : std_logic;
signal s_fifo_tx_full : std_logic;
-signal s_fifo_tx_am_empty : std_logic;
+--signal s_fifo_tx_am_empty : std_logic;
signal s_fifo_tx_empty : std_logic;
signal s_fifo_tx_data : std_logic_vector(31 downto 0);
signal s_fifo_tx_rd : std_logic;
-signal s_fifo_tx_clr : std_logic;
signal s_fifo_tx_we : std_logic;
-signal s_fifo_tx_gauge : std_logic_vector(3 downto 0);
signal s_fifo_rx_am_full : std_logic;
-signal s_fifo_rx_full : std_logic;
signal s_fifo_rx_am_empty : std_logic;
signal s_fifo_rx_empty : std_logic;
signal s_fifo_rx_data : std_logic_vector(31 downto 0);
signal s_fifo_rx_q : std_logic_vector(31 downto 0);
signal s_fifo_rx_rd : std_logic;
signal s_fifo_rx_pop : std_logic;
-signal s_fifo_rx_clr : std_logic;
signal s_fifo_rx_we : std_logic;
signal s_fifo_rx_gauge : std_logic_vector(3 downto 0);
------------------------------------------------------------------------------------------
@@ -269,9 +262,9 @@ begin
rd_i => s_fifo_tx_rd,
empty_o => s_fifo_tx_empty,
full_o => s_fifo_tx_full,
- almost_empty_o => s_fifo_tx_am_empty,
+ almost_empty_o => open,
almost_full_o => s_fifo_tx_am_full,
- count_o => s_fifo_tx_gauge);
+ count_o => open);
@@ -304,7 +297,7 @@ RX_FIFO : generic_sync_fifo
q_o => s_fifo_rx_q,
rd_i => s_fifo_rx_rd,
empty_o => s_fifo_rx_empty,
- full_o => s_fifo_rx_full,
+ full_o => open,
almost_empty_o => open,
almost_full_o => s_fifo_rx_am_full,
count_o => s_fifo_rx_gauge);
@@ -342,6 +335,9 @@ config_master_o <= s_config_master_o;
EB_RX_o.STALL <= s_fifo_rx_am_full or rx_stall;
EB_RX_o.ACK <= s_EB_RX_ACK;
EB_RX_o.ERR <= '0';
+EB_RX_o.INT <= '0';
+EB_RX_o.RTY <= '0';
+EB_RX_o.DAT <= (others => '0');
s_fifo_rx_we <= EB_RX_i.STB AND NOT (s_fifo_rx_am_full or rx_stall);
@@ -718,7 +714,6 @@ begin
s_EB_TX_CUR_CYCLE <= INIT_EB_CYC;
s_EB_RX_CUR_CYCLE <= INIT_EB_CYC;
s_EB_TX_base_wr_adr<= (others => '0');
- s_WB_CYC <= '0';
s_EB_RX_ACK <= '0';
@@ -731,13 +726,11 @@ begin
EB_TX_o.WE <= '1';
TX_silent_o <= '0';
- s_EB_RX_STALL <= '0';
- s_WB_addr_cnt <= (others => '0');
+
+
s_EB_packet_length <= (others => '0');
s_ADR_CONFIG <= '0';
- s_fifo_tx_clr <= '1';
- s_fifo_rx_clr <= '1';
s_WB_master_o.CYC <= '0';
@@ -760,8 +753,6 @@ begin
s_WB_STB <= '0';
s_EB_TX_STB <= '0';
- s_fifo_tx_clr <= '0';
- s_fifo_rx_clr <= '0';
@@ -882,17 +873,16 @@ begin
when EB_DONE => --report "EB: PACKET COMPLETE" severity note;
--TODO: test multi packet mode
s_WB_master_o.CYC <= '0';
- s_config_master_o.CYC <= '0';
+ s_config_master_o.CYC <= '0';
--make sure there is no running transfer before resetting FSMs, also do not start a new packet proc before cyc has been lowered
when ERROR => report "EB: ERROR" severity warning;
- s_WB_CYC <= '0';
- s_EB_packet_length <= (others => '0');
- s_fifo_tx_clr <= '1';
- s_fifo_rx_clr <= '1';
+ s_WB_master_o.CYC <= '0';
+ s_config_master_o.CYC <= '0';
+ s_EB_packet_length <= (others => '0');
when others => null;
diff --git a/hdl/eb_slave_core/eb_rx_ctrl.vhd b/hdl/eb_slave_core/eb_rx_ctrl.vhd
index 23c78d79b373d2ff9f0d41e67316f7cfbd541274..b02119d3dcdd003b469b61d406d521c54a15da62 100644
--- a/hdl/eb_slave_core/eb_rx_ctrl.vhd
+++ b/hdl/eb_slave_core/eb_rx_ctrl.vhd
@@ -176,8 +176,6 @@ alias a_timeout : unsigned(0 downto 0) is s_timeout_cnt(s_timeout_cnt'left
signal hdr_done : std_logic;
signal sipo_clr : std_logic;
- signal sipo_full : std_logic;
- signal sipo_empty : std_logic;
signal sipo_en : std_logic;
signal nRst_conv : std_logic;
@@ -239,7 +237,9 @@ wb_master_o <= conv_B;
-- Header FSM --
-------------------------------------------------------------------------------
--- hdr fsm outputs
+-- hdr fsm outputs
+snk_hdr_fsm.rty <= '0';
+
snk_hdr_fsm.err <= '0'; --? does wr-core handle the error line ?
snk_hdr_fsm.ack <= snk_hdr_fsm_ACK;
snk_hdr_fsm.stall <= parser_wait or snk_hdr_fsm_stall; -- enable drivers in two different processes
@@ -262,8 +262,8 @@ TOL_o <= IPV4_RX.TOL;
nRST_i => nRST_i,
en_i => sipo_en,
clr_i => sipo_clr,
- full_o => sipo_full,
- empty_o => sipo_empty);
+ full_o => open,
+ empty_o => open);
diff --git a/hdl/eb_slave_core/eb_slave_core.vhd b/hdl/eb_slave_core/eb_slave_core.vhd
index 6c556216c8b3e5294daa3f8ce21ea6d29f256059..276c7fef9257cc4b7d4c359ff99db8099c69e8e6 100644
--- a/hdl/eb_slave_core/eb_slave_core.vhd
+++ b/hdl/eb_slave_core/eb_slave_core.vhd
@@ -38,7 +38,7 @@ use work.wr_fabric_pkg.all;
entity eb_slave_core is
-generic(g_sdb_address : std_logic_vector(63 downto 0));
+generic(g_sdb_address : std_logic_vector(63 downto 0) := x"01234567ABCDEF00");
port
(
clk_i : in std_logic; --! clock input
@@ -275,6 +275,8 @@ WB_master_i.DAT <= master_i.dat;
WB_master_i.STALL <= master_i.stall;
WB_master_i.ACK <= master_i.ack;
WB_master_i.ERR <= master_i.err;
+WB_master_i.INT <= '0';
+WB_master_i.RTY <= '0';
-- ext interface to cfg space
@@ -288,6 +290,9 @@ cfg_slave_o.ack <= CFG_2_EXT_slave.ACK;
cfg_slave_o.stall <= CFG_2_EXT_slave.STALL;
cfg_slave_o.err <= CFG_2_EXT_slave.ERR;
cfg_slave_o.dat <= CFG_2_EXT_slave.DAT;
+cfg_slave_o.int <= '0';
+cfg_slave_o.rty <= '0';
+
TXCTRL : EB_TX_CTRL
port map
diff --git a/hdl/eb_slave_core/eb_tx_ctrl.vhd b/hdl/eb_slave_core/eb_tx_ctrl.vhd
index 7e33118224ee14c9dd85952679f3423538757556..2d104f2284cfa74a9ec3d463483776b1c71edfd2 100644
--- a/hdl/eb_slave_core/eb_tx_ctrl.vhd
+++ b/hdl/eb_slave_core/eb_tx_ctrl.vhd
@@ -166,14 +166,11 @@ alias a_timeout : unsigned(0 downto 0) is s_timeout_cnt(s_timeout_cnt'left
signal eop : natural range 0 to 1600;
-signal sh_hdr_en : std_logic;
+
signal s_sh_hdr_en : std_logic;
signal ld_hdr : std_logic;
-signal hdr_empty : std_logic;
-signal hdr_full : std_logic;
-
signal chksum_empty : std_logic;
-signal chksum_full : std_logic;
+--signal chksum_full : std_logic;
@@ -254,6 +251,7 @@ wb_slave_o.STALL <= conv_A.STALL when PAYLOAD,
wb_slave_o.ACK <= conv_A.ACK;
wb_slave_o.ERR <= conv_A.ERR;
wb_slave_o.RTY <= '0';
+wb_slave_o.INT <= '0';
wb_slave_o.DAT <= (others => '0');
@@ -271,7 +269,7 @@ port map ( d_i => p_chk_vals,
nRST_i => nRST_i,
en_i => sh_chk_en,
ld_i => ld_p_chk_vals,
- full_o => chksum_full,
+ full_o => open,
empty_o => chksum_empty
);
@@ -296,8 +294,8 @@ Shift_out: piso_flag generic map (c_IPV4_HLEN*8, 16, 0)
nRST_i => nRST_i,
en_i => s_sh_hdr_en,
ld_i => ld_hdr,
- full_o => hdr_full,
- empty_o => hdr_empty
+ full_o => open,
+ empty_o => open
);
@@ -370,7 +368,6 @@ begin
state_mux <= NONE;
- sh_hdr_en <= '0';
ld_hdr <= '0';
@@ -397,7 +394,6 @@ begin
if(a_timeout = "0") then
ld_hdr <= '0';
- sh_hdr_en <= '0';
ld_p_chk_vals <= '0';
sh_chk_en <= '0';
diff --git a/hdl/eb_slave_core/vhdl_2008_workaround_pkg.vhd b/hdl/eb_slave_core/vhdl_2008_workaround_pkg.vhd
index a46bc6a7990344af6724df39cf557cbce46b3b65..02d0ffa242078c5ef98bfddc8c073b0d3e850ed7 100644
--- a/hdl/eb_slave_core/vhdl_2008_workaround_pkg.vhd
+++ b/hdl/eb_slave_core/vhdl_2008_workaround_pkg.vhd
@@ -77,9 +77,10 @@ end function maximum;
function ld(X : natural)
return natural is
variable tmp : natural := 32;
- variable search : std_logic_vector(31 downto 0) := std_logic_vector(to_unsigned(X, 32));
+ variable search : std_logic_vector(31 downto 0) := (others => '0');
variable found : std_logic := '0';
begin
+ search := std_logic_vector(to_unsigned(X, 32));
if(X = 0) then
tmp := 1;
else