diff --git a/hdl/EB_SPEC_Test/alt_FIFO_am_full_flag.vhd b/hdl/EB_SPEC_Test/alt_FIFO_am_full_flag.vhd deleted file mode 100644 index 282ac0a25454188b260d1da5ce4c5f586d42b67c..0000000000000000000000000000000000000000 --- a/hdl/EB_SPEC_Test/alt_FIFO_am_full_flag.vhd +++ /dev/null @@ -1,244 +0,0 @@ ---! @file alt_FIFO_am_full_flag.vhd ---! @brief altera FIFO ---! ---! Copyright (C) 2011-2012 GSI Helmholtz Centre for Heavy Ion Research GmbH ---! ---! Important details about its implementation ---! should go in these comments. ---! ---! @author Mathias Kreider <m.kreider@gsi.de> ---! ---! @bug No know bugs. ---! --------------------------------------------------------------------------------- ---! This library is free software; you can redistribute it and/or ---! modify it under the terms of the GNU Lesser General Public ---! License as published by the Free Software Foundation; either ---! version 3 of the License, or (at your option) any later version. ---! ---! This library is distributed in the hope that it will be useful, ---! but WITHOUT ANY WARRANTY; without even the implied warranty of ---! MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ---! Lesser General Public License for more details. ---! ---! You should have received a copy of the GNU Lesser General Public ---! License along with this library. If not, see <http://www.gnu.org/licenses/>. ---------------------------------------------------------------------------------- - --- megafunction wizard: %FIFO% --- GENERATION: STANDARD --- VERSION: WM1.0 --- MODULE: scfifo - --- ============================================================ --- File Name: alt_FIFO_am_full_flag.vhd --- Megafunction Name(s): --- scfifo --- --- Simulation Library Files(s): --- altera_mf --- ============================================================ --- ************************************************************ --- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! --- --- 10.1 Build 153 11/29/2010 SJ Full Version --- ************************************************************ - - ---Copyright (C) 1991-2010 Altera Corporation ---Your use of Altera Corporation's design tools, logic functions ---and other software and tools, and its AMPP partner logic ---functions, and any output files from any of the foregoing ---(including device programming or simulation files), and any ---associated documentation or information are expressly subject ---to the terms and conditions of the Altera Program License ---Subscription Agreement, Altera MegaCore Function License ---Agreement, or other applicable license agreement, including, ---without limitation, that your use is for the sole purpose of ---programming logic devices manufactured by Altera and sold by ---Altera or its authorized distributors. Please refer to the ---applicable agreement for further details. - - -LIBRARY ieee; -USE ieee.std_logic_1164.all; - -LIBRARY altera_mf; -USE altera_mf.all; - -ENTITY alt_FIFO_am_full_flag IS - PORT - ( - clock : IN STD_LOGIC ; - data : IN STD_LOGIC_VECTOR (31 DOWNTO 0); - rdreq : IN STD_LOGIC ; - sclr : IN STD_LOGIC ; - wrreq : IN STD_LOGIC ; - almost_empty : OUT STD_LOGIC ; - almost_full : OUT STD_LOGIC ; - empty : OUT STD_LOGIC ; - full : OUT STD_LOGIC ; - q : OUT STD_LOGIC_VECTOR (31 DOWNTO 0); - usedw : OUT STD_LOGIC_VECTOR (3 DOWNTO 0) - ); -END alt_FIFO_am_full_flag; - - -ARCHITECTURE SYN OF alt_fifo_am_full_flag IS - - SIGNAL sub_wire0 : STD_LOGIC_VECTOR (3 DOWNTO 0); - SIGNAL sub_wire1 : STD_LOGIC ; - SIGNAL sub_wire2 : STD_LOGIC ; - SIGNAL sub_wire3 : STD_LOGIC_VECTOR (31 DOWNTO 0); - SIGNAL sub_wire4 : STD_LOGIC ; - SIGNAL sub_wire5 : STD_LOGIC ; - - - - COMPONENT scfifo - GENERIC ( - add_ram_output_register : STRING; - almost_empty_value : NATURAL; - almost_full_value : NATURAL; - intended_device_family : STRING; - lpm_numwords : NATURAL; - lpm_showahead : STRING; - lpm_type : STRING; - lpm_width : NATURAL; - lpm_widthu : NATURAL; - overflow_checking : STRING; - underflow_checking : STRING; - use_eab : STRING - ); - PORT ( - clock : IN STD_LOGIC ; - sclr : IN STD_LOGIC ; - usedw : OUT STD_LOGIC_VECTOR (3 DOWNTO 0); - empty : OUT STD_LOGIC ; - full : OUT STD_LOGIC ; - q : OUT STD_LOGIC_VECTOR (31 DOWNTO 0); - wrreq : IN STD_LOGIC ; - almost_empty : OUT STD_LOGIC ; - almost_full : OUT STD_LOGIC ; - data : IN STD_LOGIC_VECTOR (31 DOWNTO 0); - rdreq : IN STD_LOGIC - ); - END COMPONENT; - -BEGIN - usedw <= sub_wire0(3 DOWNTO 0); - empty <= sub_wire1; - full <= sub_wire2; - q <= sub_wire3(31 DOWNTO 0); - almost_empty <= sub_wire4; - almost_full <= sub_wire5; - - scfifo_component : scfifo - GENERIC MAP ( - add_ram_output_register => "OFF", - almost_empty_value => 1, - almost_full_value => 11, - intended_device_family => "Arria GX", - lpm_numwords => 16, - lpm_showahead => "ON", - lpm_type => "scfifo", - lpm_width => 32, - lpm_widthu => 4, - overflow_checking => "ON", - underflow_checking => "ON", - use_eab => "ON" - ) - PORT MAP ( - clock => clock, - sclr => sclr, - wrreq => wrreq, - data => data, - rdreq => rdreq, - usedw => sub_wire0, - empty => sub_wire1, - full => sub_wire2, - q => sub_wire3, - almost_empty => sub_wire4, - almost_full => sub_wire5 - ); - - - -END SYN; - --- ============================================================ --- CNX file retrieval info --- ============================================================ --- Retrieval info: PRIVATE: AlmostEmpty NUMERIC "1" --- Retrieval info: PRIVATE: AlmostEmptyThr NUMERIC "1" --- Retrieval info: PRIVATE: AlmostFull NUMERIC "1" --- Retrieval info: PRIVATE: AlmostFullThr NUMERIC "11" --- Retrieval info: PRIVATE: CLOCKS_ARE_SYNCHRONIZED NUMERIC "0" --- Retrieval info: PRIVATE: Clock NUMERIC "0" --- Retrieval info: PRIVATE: Depth NUMERIC "16" --- Retrieval info: PRIVATE: Empty NUMERIC "1" --- Retrieval info: PRIVATE: Full NUMERIC "1" --- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Arria GX" --- Retrieval info: PRIVATE: LE_BasedFIFO NUMERIC "0" --- Retrieval info: PRIVATE: LegacyRREQ NUMERIC "0" --- Retrieval info: PRIVATE: MAX_DEPTH_BY_9 NUMERIC "0" --- Retrieval info: PRIVATE: OVERFLOW_CHECKING NUMERIC "0" --- Retrieval info: PRIVATE: Optimize NUMERIC "0" --- Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "0" --- Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0" --- Retrieval info: PRIVATE: UNDERFLOW_CHECKING NUMERIC "0" --- Retrieval info: PRIVATE: UsedW NUMERIC "1" --- Retrieval info: PRIVATE: Width NUMERIC "32" --- Retrieval info: PRIVATE: dc_aclr NUMERIC "0" --- Retrieval info: PRIVATE: diff_widths NUMERIC "0" --- Retrieval info: PRIVATE: msb_usedw NUMERIC "0" --- Retrieval info: PRIVATE: output_width NUMERIC "32" --- Retrieval info: PRIVATE: rsEmpty NUMERIC "1" --- Retrieval info: PRIVATE: rsFull NUMERIC "0" --- Retrieval info: PRIVATE: rsUsedW NUMERIC "0" --- Retrieval info: PRIVATE: sc_aclr NUMERIC "0" --- Retrieval info: PRIVATE: sc_sclr NUMERIC "1" --- Retrieval info: PRIVATE: wsEmpty NUMERIC "0" --- Retrieval info: PRIVATE: wsFull NUMERIC "1" --- Retrieval info: PRIVATE: wsUsedW NUMERIC "0" --- Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all --- Retrieval info: CONSTANT: ADD_RAM_OUTPUT_REGISTER STRING "OFF" --- Retrieval info: CONSTANT: ALMOST_EMPTY_VALUE NUMERIC "1" --- Retrieval info: CONSTANT: ALMOST_FULL_VALUE NUMERIC "11" --- Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Arria GX" --- Retrieval info: CONSTANT: LPM_NUMWORDS NUMERIC "16" --- Retrieval info: CONSTANT: LPM_SHOWAHEAD STRING "ON" --- Retrieval info: CONSTANT: LPM_TYPE STRING "scfifo" --- Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "32" --- Retrieval info: CONSTANT: LPM_WIDTHU NUMERIC "4" --- Retrieval info: CONSTANT: OVERFLOW_CHECKING STRING "ON" --- Retrieval info: CONSTANT: UNDERFLOW_CHECKING STRING "ON" --- Retrieval info: CONSTANT: USE_EAB STRING "ON" --- Retrieval info: USED_PORT: almost_empty 0 0 0 0 OUTPUT NODEFVAL "almost_empty" --- Retrieval info: USED_PORT: almost_full 0 0 0 0 OUTPUT NODEFVAL "almost_full" --- Retrieval info: USED_PORT: clock 0 0 0 0 INPUT NODEFVAL "clock" --- Retrieval info: USED_PORT: data 0 0 32 0 INPUT NODEFVAL "data[31..0]" --- Retrieval info: USED_PORT: empty 0 0 0 0 OUTPUT NODEFVAL "empty" --- Retrieval info: USED_PORT: full 0 0 0 0 OUTPUT NODEFVAL "full" --- Retrieval info: USED_PORT: q 0 0 32 0 OUTPUT NODEFVAL "q[31..0]" --- Retrieval info: USED_PORT: rdreq 0 0 0 0 INPUT NODEFVAL "rdreq" --- Retrieval info: USED_PORT: sclr 0 0 0 0 INPUT NODEFVAL "sclr" --- Retrieval info: USED_PORT: usedw 0 0 4 0 OUTPUT NODEFVAL "usedw[3..0]" --- Retrieval info: USED_PORT: wrreq 0 0 0 0 INPUT NODEFVAL "wrreq" --- Retrieval info: CONNECT: @clock 0 0 0 0 clock 0 0 0 0 --- Retrieval info: CONNECT: @data 0 0 32 0 data 0 0 32 0 --- Retrieval info: CONNECT: @rdreq 0 0 0 0 rdreq 0 0 0 0 --- Retrieval info: CONNECT: @sclr 0 0 0 0 sclr 0 0 0 0 --- Retrieval info: CONNECT: @wrreq 0 0 0 0 wrreq 0 0 0 0 --- Retrieval info: CONNECT: almost_empty 0 0 0 0 @almost_empty 0 0 0 0 --- Retrieval info: CONNECT: almost_full 0 0 0 0 @almost_full 0 0 0 0 --- Retrieval info: CONNECT: empty 0 0 0 0 @empty 0 0 0 0 --- Retrieval info: CONNECT: full 0 0 0 0 @full 0 0 0 0 --- Retrieval info: CONNECT: q 0 0 32 0 @q 0 0 32 0 --- Retrieval info: CONNECT: usedw 0 0 4 0 @usedw 0 0 4 0 --- Retrieval info: GEN_FILE: TYPE_NORMAL alt_FIFO_am_full_flag.vhd TRUE --- Retrieval info: GEN_FILE: TYPE_NORMAL alt_FIFO_am_full_flag.inc FALSE --- Retrieval info: GEN_FILE: TYPE_NORMAL alt_FIFO_am_full_flag.cmp TRUE --- Retrieval info: GEN_FILE: TYPE_NORMAL alt_FIFO_am_full_flag.bsf FALSE --- Retrieval info: GEN_FILE: TYPE_NORMAL alt_FIFO_am_full_flag_inst.vhd FALSE --- Retrieval info: LIB_FILE: altera_mf