DistributedOscilloscope-1.0.0.tar.gz PyWrtd-1.0.tar.gz DistScope.zip# Distributed oscilloscope
Project description
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A system to characterise large area silicon pad sensors with several hundred channels. It consists of two PCBs. One is an active switching matrix that is essentially a 512-to-1 multiplexer with controls and interface to capacitance and current measurement devices. The second one is a passive probe card that establishes the contact to the sensor. More details can be found at https://gitlab.cern.ch/skulis/HGCSensorProbeCard.
Main Features
- 4-lane PCIe (Gennum GN4124) obsolete component, not available anymore
- 1x Xilinx Spartan6 FPGA (XC6SLX45T-3FGG484C) (PCI Device ID: 0x18D)
- special versions with XC6SLX100T and XC6SLX150T available
- FMC slot with low pin count (LPC) connector
- Vadj fixed to 2.5V
- FMC connectivity: all 34 differential pairs connected, 1 GTP transceiver with clock, 2 clock pairs, JTAG, I2C
- No dedicated clock signals from Carrier to FMC (only available on HPC pins)
- Stand-alone features
- External 12V power supply connector
- mini USB connector
- 4 LEDs
- 2 buttons
- Power consumption: 5-12 Watt, depending on application
- Optimised for cost
- 6-layer PCB
- Optional cooling fan for the mezzanine.
Project information
Contacts
- Dimitris Lampridis - CERN
- Milosz Malczak - CERN
Status
Date | Event |
---|---|
24 July 2019 | Start working on project. |
24 July 2019