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DIOT Zynq Ultrascale-based System Board
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DIOT Zynq Ultrascale-based System Board
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Improve routing of FMC transceivers
#239
· opened
May 27, 2021
by
Grzegorz Daniluk
v2.0
Done
CLOSED
8
updated
Jun 28, 2023
Wrong i2c address of MAX6639 on schematic
#246
· opened
Jul 21, 2021
by
Adam Wujek
v2.0
Done
CLOSED
4
updated
Dec 16, 2021
Silkscreen modifications
4 of 4 tasks completed
#242
· opened
Jul 06, 2021
by
Grzegorz Daniluk
v2.0
Done
CLOSED
4
updated
Sep 23, 2021
power-supply-1: P1V8AUX_PG connected to wrong IC30 channel
#253
· opened
Sep 16, 2021
by
Grzegorz Daniluk
v2.0
Done
CLOSED
1
updated
Sep 23, 2021
Replace C100 with higher voltage rating
#231
· opened
Feb 04, 2021
by
Grzegorz Daniluk
v2.0
Done
Major
CLOSED
1
updated
Sep 15, 2021
TVS diodes are placed after the series resistors
#237
· opened
Apr 20, 2021
by
Christos Gentsos
v2.0
Done
Minor
CLOSED
0
updated
Sep 15, 2021
reorganise I2C bus
3 of 3 tasks completed
#241
· opened
Jul 05, 2021
by
Grzegorz Daniluk
v2.0
Done
CLOSED
6
updated
Sep 15, 2021
SG-310 SCN is obsolete
#249
· opened
Jul 22, 2021
by
Grzegorz Daniluk
v2.0
Done
CLOSED
1
updated
Sep 14, 2021
Change license from CERN-OHL-S v2 to CERN-OHL-W v2
#243
· opened
Jul 06, 2021
by
Grzegorz Daniluk
v2.0
Done
CLOSED
0
updated
Sep 14, 2021
Add descriptions of sensors in schematics
#247
· opened
Jul 21, 2021
by
Adam Wujek
v2.0
Done
CLOSED
0
updated
Sep 14, 2021
DXP2 pin in MAX6639 not connected
#245
· opened
Jul 21, 2021
by
Adam Wujek
v2.0
Done
CLOSED
0
updated
Sep 14, 2021
The reset pin of the flash chips is connected to ps_por_b which is 3.3V while the flash are 1.8V
#230
· opened
Dec 14, 2020
by
Grzegorz Daniluk
v2.0
Done
Major
CLOSED
0
updated
Sep 14, 2021
add one more 24AA025E48-I/SN on I2C-WRFLASH bus
#240
· opened
Jul 05, 2021
by
Grzegorz Daniluk
v2.0
Done
CLOSED
0
updated
Sep 14, 2021
Update version resistors to reflect version v2.0
#244
· opened
Jul 06, 2021
by
Grzegorz Daniluk
v2.0
Done
CLOSED
0
updated
Sep 14, 2021
fpga-config: SDIO_PROTECT and SDIO_DETECT should be pulled-up to P3V3 and NOT P1V8
#234
· opened
Apr 06, 2021
by
Grzegorz Daniluk
v2.0
Done
CLOSED
0
updated
Sep 14, 2021
fpga-config: PS_MODE1/2 swapped at FPGA pins
#233
· opened
Apr 06, 2021
by
Grzegorz Daniluk
v2.0
Done
CLOSED
0
updated
Sep 14, 2021
fpga-config: R160, R161, R162, R163 should be not mounted to allow for boot mode selection with SW1
#232
· opened
Apr 01, 2021
by
Grzegorz Daniluk
v2.0
Done
CLOSED
0
updated
Sep 14, 2021
WR-clocks: R55, R56, R60, R242, R243 should not be mounted to generate 62.5MHz WR helper clock
#236
· opened
Apr 15, 2021
by
Grzegorz Daniluk
v2.0
Done
CLOSED
2
updated
Sep 14, 2021
Missing pull-ups for PWRBTN_N and PWR_FAIL_N
#229
· opened
Oct 06, 2020
by
Christos Gentsos
v2.0
Done
Minor
CLOSED
3
updated
Sep 14, 2021
add a fuse on 12V before it goes to the FMC
#238
· opened
May 03, 2021
by
Grzegorz Daniluk
v2.0
Done
CLOSED
2
updated
Sep 14, 2021