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DIOT Zynq Ultrascale-based System Board
DIOT Zynq Ultrascale-based System Board
Commit fb723524 authored by Adam Wujek's avatar Adam Wujek Committed by Adam Wujek
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sw/petalinux/linux: add patches for ethernet PHY 

Signed-off-by: 's avatarAdam Wujek <dev_public@wujek.eu>
parent 5e334670
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sw/petalinux/project-spec/meta-user/recipes-kernel/linux/linux-xlnx/0001-net-xilinx_phy-Add-flag-to-reset-after-clock-enable.patch 0 → 100644
View file @ fb723524
From 29b2379c80cfe11f1def0c16b52d9b229fee781a Mon Sep 17 00:00:00 2001
From: Harini Katakam <harini.katakam@xilinx.com>
Date: Mon, 23 Sep 2019 22:36:33 +0530
Subject: [LINUX PATCH 1/2] net: xilinx_phy: Add flag to reset after clock
enable
Enable flag to require phy reset after reference clock is enabled.
The MAC driver using this phy can call phy_reset_after_clock_enable
and the phy framework will check this flag before allowing the reset.
Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
---
drivers/net/phy/xilinx_phy.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/phy/xilinx_phy.c b/drivers/net/phy/xilinx_phy.c
index 2410fa3..16aad53 100644
--- a/drivers/net/phy/xilinx_phy.c
+++ b/drivers/net/phy/xilinx_phy.c
@@ -139,6 +139,7 @@ static struct phy_driver xilinx_drivers[] = {
.phy_id = XILINX_PHY_ID,
.phy_id_mask = XILINX_PHY_ID_MASK,
.name = "Xilinx PCS/PMA PHY",
+ .flags = PHY_RST_AFTER_CLK_EN,
.features = PHY_GBIT_FEATURES,
.config_init = &xilinxphy_config_init,
.config_aneg = &genphy_config_aneg,
--
2.7.4
sw/petalinux/project-spec/meta-user/recipes-kernel/linux/linux-xlnx/0002-net-macb-Handle-phy-reset-for-PCS-PMA-IP.patch 0 → 100644
View file @ fb723524
From f037da759e58e35ec0fa1bf4b0982ff7737e042a Mon Sep 17 00:00:00 2001
From: Harini Katakam <harini.katakam@xilinx.com>
Date: Mon, 23 Sep 2019 22:56:01 +0530
Subject: [LINUX PATCH 2/2] net: macb: Handle phy reset for PCS PMA IP
Call phy reset (conditional on the flag the phy framework checks)
in macb_open and if the reset succeeds, re-initialize the phy.
This is required because of runtime clock handling.
Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
---
drivers/net/ethernet/cadence/macb_main.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c
index fff8b4a..cda00c1 100644
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
@@ -2596,6 +2596,12 @@ static int macb_open(struct net_device *dev)
bp->macbgem_ops.mog_init_rings(bp);
macb_init_hw(bp);
+ /* Since this driver uses runtime handling of clocks, initiate a phy
+ * reset if the attached phy requires it. Check return to see if phy
+ * was reset and then do a phy initialization.
+ */
+ if (phy_reset_after_clk_enable(dev->phydev) == 1)
+ phy_init_hw(dev->phydev);
/* schedule a link state check */
phy_start(dev->phydev);
--
2.7.4
sw/petalinux/project-spec/meta-user/recipes-kernel/linux/linux-xlnx_%.bbappend 0 → 100644
View file @ fb723524
FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"
SRC_URI += "file://devtool-fragment.cfg \
file://0001-net-xilinx_phy-Add-flag-to-reset-after-clock-enable.patch \
file://0002-net-macb-Handle-phy-reset-for-PCS-PMA-IP.patch"
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