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DIOT Zynq Ultrascale-based System Board
DIOT Zynq Ultrascale-based System Board
Commit d53e9e33 authored by Grzegorz Daniluk's avatar Grzegorz Daniluk
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trying CI

parent 90c5ed25
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    .gitlab-ci.yml 0 → 100644
    View file @ d53e9e33
    variables:
    GIT_SUBMODULE_STRATEGY: normal
    stages:
    - compile
    job_sw_compile:
    stage: compile
    tags:
    - petalinux_2019.2
    # only:
    # - schedules
    script:
    - git config --global user.email "OHWR_CI@somewhere.com"
    - git config --global user.name "OHWR_CI"
    - cd sw && make -j 4
    artifacts:
    name: DIOT_SB_CI_$CI_JOB_ID
    when: always
    paths:
    - sw/artifacts/BOOT.BIN
    - sw/artifacts/image.ub
    - sw/artifacts/fsbl.elf
    - sw/log/*
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