--==============================================================================
--! @file diot_v2_top.vhd
--==============================================================================
--------------------------------------------------------------------------------
-- --
-- CERN - diot_v2 --
-- --
--------------------------------------------------------------------------------
--
-- unit name:  dios_sb_top
--
--! @brief top level DIOT system board Version 2 based in ZynqMP+
--
--! @author alen.arias.vazquez@cern.ch
--
--! @date 01/04/2022
--
--------------------------------------------------------------------------------

library ieee;
library unisim;

use ieee.std_logic_1164.all;
use unisim.vcomponents.all;

--==============================================================================
--! Entity declaration for diot_v2_top
--==============================================================================
entity diot_v2_top is
    port (
        f_rst_b             : inout std_logic;
        psu_alert_i         : in std_logic;
        p_pres_i_0          : in std_logic_vector(1 downto 0);
        pwr_cycle_req_o_0   : out std_logic;
        clk_src_sel_o       : out std_logic_vector(1 downto 0);
        gtrefclk_in_clk_p   : in std_logic;
        gtrefclk_in_clk_n   : in std_logic;
        pl_reset_led        : out std_logic;
        link_status_led     : out std_logic;
        link_sync_led       : out std_logic;
        mdc_clk_led         : out std_logic;
        tx_disable_o        : out std_logic;
        sfp_rxp             : in std_logic;
        sfp_rxn             : in std_logic;
        sfp_txp             : out std_logic;
        sfp_txn             : out std_logic;
        bckpl_rst_n_o       : out std_logic;
        bckpl_servmod_b     : inout std_logic_vector(7 downto 0);
        bckpl_scl_b         : inout std_logic;
        bckpl_sda_b         : inout std_logic;
        emio_scl_b          : inout std_logic;
        emio_sda_b          : inout std_logic;
        wrflash_scl_b       : inout std_logic;
        wrflash_sda_b       : inout std_logic
    );
end diot_v2_top;

--==============================================================================
--! Architecture declaration
--==============================================================================
architecture structure of diot_v2_top is

    component diot_v2 is
        port (
            f_rst_i             : in std_logic;
            f_rst_o             : out std_logic;
            f_rst_t             : out std_logic;
            psu_alert_i         : in std_logic;
            p_pres_i_0          : in std_logic_vector(1 downto 0);
            pwr_cycle_req_o_0   : out std_logic;
            clk_src_sel_o       : out std_logic_vector(1 downto 0);
            gtrefclk_in_clk_p   : in std_logic;
            gtrefclk_in_clk_n   : in std_logic;
            pl_reset_led        : out std_logic;
            link_status_led     : out std_logic;
            link_sync_led       : out std_logic;
            mdc_clk_led         : out std_logic;
            tx_disable_o        : out std_logic;
            sfp_rxp             : in std_logic;
            sfp_rxn             : in std_logic;
            sfp_txp             : out std_logic;
            sfp_txn             : out std_logic;
            bckpl_rst_n_o       : out std_logic;
            bckpl_servmod_i     : in std_logic_vector(7 downto 0);
            bckpl_servmod_o     : out std_logic_vector(7 downto 0);
            bckpl_servmod_t     : out std_logic_vector(7 downto 0);
            i2c_bckpl_scl_i     : in std_logic;
            i2c_bckpl_scl_o     : out std_logic;
            i2c_bckpl_scl_t     : out std_logic;
            i2c_bckpl_sda_i     : in std_logic;
            i2c_bckpl_sda_o     : out std_logic;
            i2c_bckpl_sda_t     : out std_logic;
            i2c_emio_scl_i      : in std_logic;
            i2c_emio_scl_o      : out std_logic;
            i2c_emio_scl_t      : out std_logic;
            i2c_emio_sda_i      : in std_logic;
            i2c_emio_sda_o      : out std_logic;
            i2c_emio_sda_t      : out std_logic;
            i2c_wrflash_scl_i   : in std_logic;
            i2c_wrflash_scl_o   : out std_logic;
            i2c_wrflash_scl_t   : out std_logic;
            i2c_wrflash_sda_i   : in std_logic;
            i2c_wrflash_sda_o   : out std_logic;
            i2c_wrflash_sda_t   : out std_logic
        );
    end component diot_v2;

    --! Signals backplane servmod
    signal s_bckpl_servmod_o    : std_logic_vector(7 downto 0);
    signal s_bckpl_servmod_i    : std_logic_vector(7 downto 0);
    signal s_bckpl_servmod_t    : std_logic_vector(7 downto 0);

    --! Signals F RST buffer
    signal s_f_rst_o            : std_logic;
    signal s_f_rst_i            : std_logic;
    signal s_f_rst_t            : std_logic;

    --! Signals I2C WR FLASH
    signal s_wrflash_scl_i      : std_logic;
    signal s_wrflash_scl_o      : std_logic;
    signal s_wrflash_scl_t      : std_logic;
    signal s_wrflash_sda_i      : std_logic;
    signal s_wrflash_sda_o      : std_logic;
    signal s_wrflash_sda_t      : std_logic;

    --! Signals I2C Backplane
    signal s_bckpl_scl_i        : std_logic;
    signal s_bckpl_scl_o        : std_logic;
    signal s_bckpl_scl_t        : std_logic;
    signal s_bckpl_sda_i        : std_logic;
    signal s_bckpl_sda_o        : std_logic;
    signal s_bckpl_sda_t        : std_logic;

    --! Signals I2C EMIO
    signal s_emio_scl_i         : std_logic;
    signal s_emio_scl_o         : std_logic;
    signal s_emio_scl_t         : std_logic;
    signal s_emio_sda_i         : std_logic;
    signal s_emio_sda_o         : std_logic;
    signal s_emio_sda_t         : std_logic;

--==============================================================================
--! Architecture begin
--==============================================================================
begin

    ----------------------------------------------------------------------------
    --! I2C Write Flash
    i_buf_wr_flash_scl : IOBUF
        port map (
            I   => s_wrflash_scl_o,
            O   => s_wrflash_scl_i,
            T   => s_wrflash_scl_t,
            IO  => wrflash_scl_b
        );

    i_buf_wr_flash_sda : IOBUF
        port map (
            I   => s_wrflash_sda_o,
            O   => s_wrflash_sda_i,
            T   => s_wrflash_sda_t,
            IO  => wrflash_sda_b
        );

    ----------------------------------------------------------------------------
    --! I2C Backplane
    i_buf_bckpl_scl : IOBUF
        port map (
            I   => s_bckpl_scl_o,
            O   => s_bckpl_scl_i,
            T   => s_bckpl_scl_t,
            IO  => bckpl_scl_b
        );

    i_buf_bckpl_sda : IOBUF
        port map (
            I   => s_bckpl_sda_o,
            O   => s_bckpl_sda_i,
            T   => s_bckpl_sda_t,
            IO  => bckpl_sda_b
        );

    ----------------------------------------------------------------------------
    --! I2C EMIO -> PS I2C 1
    i_buf_emio_scl : IOBUF
        port map (
            I   => s_emio_scl_o,
            O   => s_emio_scl_i,
            T   => s_emio_scl_t,
            IO  => emio_scl_b
        );

    i_buf_emio_sda : IOBUF
        port map (
            I   => s_emio_sda_o,
            O   => s_emio_sda_i,
            T   => s_emio_sda_t,
            IO  => emio_sda_b
        );

    ----------------------------------------------------------------------------
    --! F RST
    i_buf_f_rst : IOBUF
        port map (
            I   => s_f_rst_o,
            O   => s_f_rst_i,
            T   => s_f_rst_t,
            IO  => f_rst_b
        );

    ----------------------------------------------------------------------------
    --! Backplane Servmod
    gen_buf_servmod: for x in 7 downto 0 generate
        i_buf_servmod : IOBUF
            port map (
                I   => s_bckpl_servmod_o(x),
                O   => s_bckpl_servmod_i(x),
                T   => s_bckpl_servmod_t(x),
                IO  => bckpl_servmod_b(x)
            );
    end generate gen_buf_servmod;

    ----------------------------------------------------------------------------
    --! Block Design instance
    diot_v2_i: component diot_v2
        port map (
            f_rst_i             => s_f_rst_i,
            f_rst_o             => s_f_rst_o,
            f_rst_t             => s_f_rst_t,
            psu_alert_i         => psu_alert_i,
            p_pres_i_0          => p_pres_i_0,
            pwr_cycle_req_o_0   => pwr_cycle_req_o_0,
            clk_src_sel_o       => clk_src_sel_o,
            gtrefclk_in_clk_p   => gtrefclk_in_clk_p,
            gtrefclk_in_clk_n   => gtrefclk_in_clk_n,
            pl_reset_led        => pl_reset_led,
            link_status_led     => link_status_led,
            link_sync_led       => link_sync_led,
            mdc_clk_led         => mdc_clk_led,
            tx_disable_o        => tx_disable_o,
            sfp_rxp             => sfp_rxp,
            sfp_rxn             => sfp_rxn,
            sfp_txp             => sfp_txp,
            sfp_txn             => sfp_txn,
            bckpl_rst_n_o       => bckpl_rst_n_o,
            bckpl_servmod_i     => s_bckpl_servmod_i,
            bckpl_servmod_o     => s_bckpl_servmod_o,
            bckpl_servmod_t     => s_bckpl_servmod_t,
            i2c_bckpl_scl_i     => s_bckpl_scl_i,
            i2c_bckpl_scl_o     => s_bckpl_scl_o,
            i2c_bckpl_scl_t     => s_bckpl_scl_t,
            i2c_bckpl_sda_i     => s_bckpl_sda_i,
            i2c_bckpl_sda_o     => s_bckpl_sda_o,
            i2c_bckpl_sda_t     => s_bckpl_sda_t,
            i2c_emio_scl_i      => s_emio_scl_i,
            i2c_emio_scl_o      => s_emio_scl_o,
            i2c_emio_scl_t      => s_emio_scl_t,
            i2c_emio_sda_i      => s_emio_sda_i,
            i2c_emio_sda_o      => s_emio_sda_o,
            i2c_emio_sda_t      => s_emio_sda_t,
            i2c_wrflash_scl_i   => s_wrflash_scl_i,
            i2c_wrflash_scl_o   => s_wrflash_scl_o,
            i2c_wrflash_scl_t   => s_wrflash_scl_t,
            i2c_wrflash_sda_i   => s_wrflash_sda_i,
            i2c_wrflash_sda_o   => s_wrflash_sda_o,
            i2c_wrflash_sda_t   => s_wrflash_sda_t
        );

end architecture structure;
--==============================================================================
-- architecture end
--==============================================================================
