Skip to content

DIOT Igloo2-based radiation-tolerant System Board
DIOT Igloo2-based radiation-tolerant System Board
Commit fd64a34b authored by Grzegorz Daniluk's avatar Grzegorz Daniluk
Browse files
Options

remove Altium project from the repo, it's stored in EDMS now

parent c1ed54ef
Expand all Hide whitespace changes
Inline Side-by-side
Showing with 0 additions and 3165 deletions
hw/.gitignore deleted 100644 → 0
View file @ c1ed54ef
**/__Previews
History
Project Logs*/
IbisReport.txt
IbisErrors.txt
hw/Assembly data/EDA-04326-V1-0.OutJob deleted 100644 → 0
View file @ c1ed54ef
This diff is collapsed.
hw/DIOT-sb-igl.OutJob deleted 100644 → 0
View file @ c1ed54ef
[OutputJobFile]
Version=1.0
Caption=
Description=
VaultGUID=
ItemGUID=
ItemHRID=
RevisionGUID=
RevisionId=
VaultHRID=
AutoItemHRID=
NextRevId=
FolderGUID=
LifeCycleDefinitionGUID=
RevisionNamingSchemeGUID=
[OutputGroup1]
Name=DIOT-sb-igl.OutJob
Description=
TargetOutputMedium=PDF
VariantName=[No Variations]
VariantScope=0
CurrentConfigurationName=
TargetPrinter=Virtual Printer
PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1
OutputMedium1=Print Job
OutputMedium1_Type=Printer
OutputMedium1_Printer=
OutputMedium1_PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1
OutputMedium2=PDF
OutputMedium2_Type=Publish
OutputMedium3=Folder Structure
OutputMedium3_Type=GeneratedFiles
OutputMedium4=Video
OutputMedium4_Type=Multimedia
OutputType1=Schematic Print
OutputName1=Schematic Prints
OutputCategory1=Documentation
OutputDocumentPath1=
OutputVariantName1=
OutputEnabled1=1
OutputEnabled1_OutputMedium1=0
OutputEnabled1_OutputMedium2=1
OutputEnabled1_OutputMedium3=0
OutputEnabled1_OutputMedium4=0
OutputDefault1=0
PageOptions1=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=0.70|XCorrection=1.00|YCorrection=1.00|PrintKind=0|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-2|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9
Configuration1_Name1=OutputConfigurationParameter1
Configuration1_Item1=Record=SchPrintView|ShowNoERC=True|ShowParamSet=True|ShowProbe=True|ShowBlanket=True|NoERCSymbolsToShow="Thin Cross","Thick Cross","Small Cross",Checkbox,Triangle|ShowNote=True|ShowNoteCollapsed=True|ShowOpenEnds=True|ExpandDesignator=True|ExpandNetLabel=False|ExpandPort=False|ExpandSheetNum=False|ExpandDocNum=False|PrintArea=0|PrintAreaRect.X1=0|PrintAreaRect.Y1=0|PrintAreaRect.X2=0|PrintAreaRect.Y2=0
[PublishSettings]
OutputFilePath2=D:\Altium projects\DIOT-sb-igl\hw\.\DIOT-sb-igl.pdf
ReleaseManaged2=0
OutputBasePath2=.\
OutputPathMedia2=
OutputPathMediaValue2=
OutputPathOutputer2=[Output Type]
OutputPathOutputerPrefix2=
OutputPathOutputerValue2=
OutputFileName2=DIOT-sb-igl.pdf
OutputFileNameMulti2=
UseOutputNameForMulti2=1
OutputFileNameSpecial2=
OpenOutput2=0
PromptOverwrite2=1
PublishMethod2=0
ZoomLevel2=50
FitSCHPrintSizeToDoc2=0
FitPCBPrintSizeToDoc2=0
GenerateNetsInfo2=0
MarkPins2=1
MarkNetLabels2=1
MarkPortsId2=1
GenerateTOC2=1
ShowComponentParameters2=1
GlobalBookmarks2=0
PDFACompliance2=Disabled
PDFVersion2=Default
OutputFilePath3=
ReleaseManaged3=1
OutputBasePath3=Project Outputs for DIOT-sb-igl
OutputPathMedia3=
OutputPathMediaValue3=
OutputPathOutputer3=[Output Type]
OutputPathOutputerPrefix3=
OutputPathOutputerValue3=
OutputFileName3=
OutputFileNameMulti3=
UseOutputNameForMulti3=1
OutputFileNameSpecial3=
OpenOutput3=0
OutputFilePath4=
ReleaseManaged4=1
OutputBasePath4=Project Outputs for DIOT-sb-igl
OutputPathMedia4=
OutputPathMediaValue4=
OutputPathOutputer4=[Output Type]
OutputPathOutputerPrefix4=
OutputPathOutputerValue4=
OutputFileName4=
OutputFileNameMulti4=
UseOutputNameForMulti4=1
OutputFileNameSpecial4=
OpenOutput4=0
PromptOverwrite4=1
PublishMethod4=5
ZoomLevel4=50
FitSCHPrintSizeToDoc4=1
FitPCBPrintSizeToDoc4=1
GenerateNetsInfo4=1
MarkPins4=1
MarkNetLabels4=1
MarkPortsId4=1
MediaFormat4=Windows Media file (*.wmv,*.wma,*.asf)
FixedDimensions4=1
Width4=352
Height4=288
MultiFile4=0
FramesPerSecond4=25
FramesPerSecondDenom4=1
AviPixelFormat4=7
AviCompression4=MP42 MS-MPEG4 V2
AviQuality4=100
FFmpegVideoCodecId4=13
FFmpegPixelFormat4=0
FFmpegQuality4=80
WmvVideoCodecName4=Windows Media Video V7
WmvQuality4=80
[GeneratedFilesSettings]
RelativeOutputPath2=D:\Altium projects\DIOT-sb-igl\hw\.\DIOT-sb-igl.pdf
OpenOutputs2=0
RelativeOutputPath3=
OpenOutputs3=0
AddToProject3=1
TimestampFolder3=0
UseOutputName3=0
OpenODBOutput3=0
OpenGerberOutput3=0
OpenNCDrillOutput3=0
OpenIPCOutput3=0
EnableReload3=0
RelativeOutputPath4=
OpenOutputs4=0
hw/EDA-04326-V1-0_project.Annotation deleted 100644 → 0
View file @ c1ed54ef
[DesignatorManager]
LogicalDesignator0=
LogicalPartID0=1
DocumentName0=Translate_OD_3V3_to_2V5.SchDoc
ChannelName0=MoniMod_I2C_Translation_SCL
UniqueID0=\UYZJAXMD\FHHRMRKM\ANJSDILO\BGECSZKP
PhysicalDesignator0=R50
PhysicalDesignatorLocked0=1
LogicalDesignator1=
LogicalPartID1=1
DocumentName1=Translate_OD_3V3_to_2V5.SchDoc
ChannelName1=MoniMod_I2C_Translation_SCL
UniqueID1=\UYZJAXMD\FHHRMRKM\ANJSDILO\BYAVUKJG
PhysicalDesignator1=T3
PhysicalDesignatorLocked1=1
LogicalDesignator2=
LogicalPartID2=1
DocumentName2=Translate_OD_3V3_to_2V5.SchDoc
ChannelName2=MoniMod_I2C_Translation_SCL
UniqueID2=\UYZJAXMD\FHHRMRKM\ANJSDILO\LEBYSBXI
PhysicalDesignator2=R55
PhysicalDesignatorLocked2=1
LogicalDesignator3=R178
LogicalPartID3=1
DocumentName3=Translate_OD_3V3_to_2V5.SchDoc
ChannelName3=PCB_VER_I2C_Translation_SDA
UniqueID3=\UYZJAXMD\FHHRMRKM\FPHWCUDC\BGECSZKP
PhysicalDesignator3=R178
PhysicalDesignatorLocked3=0
LogicalDesignator4=T13
LogicalPartID4=1
DocumentName4=Translate_OD_3V3_to_2V5.SchDoc
ChannelName4=PCB_VER_I2C_Translation_SDA
UniqueID4=\UYZJAXMD\FHHRMRKM\FPHWCUDC\BYAVUKJG
PhysicalDesignator4=T13
PhysicalDesignatorLocked4=0
LogicalDesignator5=R180
LogicalPartID5=1
DocumentName5=Translate_OD_3V3_to_2V5.SchDoc
ChannelName5=PCB_VER_I2C_Translation_SDA
UniqueID5=\UYZJAXMD\FHHRMRKM\FPHWCUDC\LEBYSBXI
PhysicalDesignator5=R180
PhysicalDesignatorLocked5=0
LogicalDesignator6=R178
LogicalPartID6=1
DocumentName6=Translate_OD_3V3_to_2V5.SchDoc
ChannelName6=PCB_VER_I2C_Translation_SCL
UniqueID6=\UYZJAXMD\FHHRMRKM\PIPUMNVY\BGECSZKP
PhysicalDesignator6=R179
PhysicalDesignatorLocked6=0
LogicalDesignator7=T13
LogicalPartID7=1
DocumentName7=Translate_OD_3V3_to_2V5.SchDoc
ChannelName7=PCB_VER_I2C_Translation_SCL
UniqueID7=\UYZJAXMD\FHHRMRKM\PIPUMNVY\BYAVUKJG
PhysicalDesignator7=T12
PhysicalDesignatorLocked7=0
LogicalDesignator8=R180
LogicalPartID8=1
DocumentName8=Translate_OD_3V3_to_2V5.SchDoc
ChannelName8=PCB_VER_I2C_Translation_SCL
UniqueID8=\UYZJAXMD\FHHRMRKM\PIPUMNVY\LEBYSBXI
PhysicalDesignator8=R181
PhysicalDesignatorLocked8=0
LogicalDesignator9=
LogicalPartID9=1
DocumentName9=Translate_OD_3V3_to_2V5.SchDoc
ChannelName9=MoniMod_I2C_Translation_SDA
UniqueID9=\UYZJAXMD\FHHRMRKM\SOSEGRKW\BGECSZKP
PhysicalDesignator9=R51
PhysicalDesignatorLocked9=1
LogicalDesignator10=
LogicalPartID10=1
DocumentName10=Translate_OD_3V3_to_2V5.SchDoc
ChannelName10=MoniMod_I2C_Translation_SDA
UniqueID10=\UYZJAXMD\FHHRMRKM\SOSEGRKW\BYAVUKJG
PhysicalDesignator10=T2
PhysicalDesignatorLocked10=1
LogicalDesignator11=
LogicalPartID11=1
DocumentName11=Translate_OD_3V3_to_2V5.SchDoc
ChannelName11=MoniMod_I2C_Translation_SDA
UniqueID11=\UYZJAXMD\FHHRMRKM\SOSEGRKW\LEBYSBXI
PhysicalDesignator11=R56
PhysicalDesignatorLocked11=1
[SheetNumberManager]
SheetNumberOrder=Display Order
SheetNumberMethod=Increasing
hw/EDA-04326-V1-0_project.OutJob deleted 100644 → 0
View file @ c1ed54ef
[OutputJobFile]
Version=1.0
[OutputGroup1]
Name=
Description=
TargetOutputMedium=PDF
VariantName=[No Variations]
VariantScope=0
CurrentConfigurationName=
TargetPrinter=Virtual Printer
PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1
OutputMedium1=Print Job
OutputMedium1_Type=Printer
OutputMedium1_Printer=
OutputMedium1_PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1
OutputMedium2=PDF
OutputMedium2_Type=Publish
OutputMedium3=Folder Structure
OutputMedium3_Type=GeneratedFiles
OutputMedium4=Video
OutputMedium4_Type=Multimedia
OutputType1=Schematic Print
OutputName1=Schematic Prints
OutputCategory1=Documentation
OutputDocumentPath1=
OutputVariantName1=
OutputEnabled1=1
OutputEnabled1_OutputMedium1=0
OutputEnabled1_OutputMedium2=1
OutputEnabled1_OutputMedium3=0
OutputEnabled1_OutputMedium4=0
OutputDefault1=0
PageOptions1=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=0.66|XCorrection=1.00|YCorrection=1.00|PrintKind=0|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=Letter|PaperIndex=1
Configuration1_Name1=OutputConfigurationParameter1
Configuration1_Item1=Record=SchPrintView|ShowNoERC=True|ShowParamSet=True|ShowProbe=True|ShowBlanket=True|NoERCSymbolsToShow="Thin Cross","Thick Cross","Small Cross",Checkbox,Triangle|ShowNote=True|ShowNoteCollapsed=True|ShowOpenEnds=True|ExpandDesignator=True|ExpandNetLabel=False|ExpandPort=False|ExpandSheetNum=False|ExpandDocNum=False|PrintArea=0|PrintAreaRect.X1=0|PrintAreaRect.Y1=0|PrintAreaRect.X2=0|PrintAreaRect.Y2=0|DocumentPath=
[PublishSettings]
OutputFilePath2=C:\Users\Christos\Downloads\diot-sb-igl\.PDF
ReleaseManaged2=0
OutputBasePath2=C:\Users\Christos\Downloads\diot-sb-igl\
OutputPathMedia2=
OutputPathMediaValue2=
OutputPathOutputer2=[Output Type]
OutputPathOutputerPrefix2=
OutputPathOutputerValue2=
OutputFileName2=DIOT-sb-igl.pdf
OutputFileNameMulti2=
UseOutputNameForMulti2=1
OutputFileNameSpecial2=
OpenOutput2=0
PromptOverwrite2=1
PublishMethod2=0
ZoomLevel2=50
FitSCHPrintSizeToDoc2=0
FitPCBPrintSizeToDoc2=0
GenerateNetsInfo2=0
MarkPins2=1
MarkNetLabels2=1
MarkPortsId2=1
GenerateTOC2=1
ShowComponentParameters2=1
GlobalBookmarks2=0
PDFACompliance2=Disabled
PDFVersion2=Default
OutputFilePath3=
ReleaseManaged3=1
OutputBasePath3=
OutputPathMedia3=
OutputPathMediaValue3=
OutputPathOutputer3=[Output Type]
OutputPathOutputerPrefix3=
OutputPathOutputerValue3=
OutputFileName3=
OutputFileNameMulti3=
UseOutputNameForMulti3=1
OutputFileNameSpecial3=
OpenOutput3=0
OutputFilePath4=
ReleaseManaged4=1
OutputBasePath4=
OutputPathMedia4=
OutputPathMediaValue4=
OutputPathOutputer4=[Output Type]
OutputPathOutputerPrefix4=
OutputPathOutputerValue4=
OutputFileName4=
OutputFileNameMulti4=
UseOutputNameForMulti4=1
OutputFileNameSpecial4=
OpenOutput4=0
PromptOverwrite4=1
PublishMethod4=5
ZoomLevel4=50
FitSCHPrintSizeToDoc4=1
FitPCBPrintSizeToDoc4=1
GenerateNetsInfo4=1
MarkPins4=1
MarkNetLabels4=1
MarkPortsId4=1
MediaFormat4=Windows Media file (*.wmv,*.wma,*.asf)
FixedDimensions4=1
Width4=352
Height4=288
MultiFile4=0
FramesPerSecond4=25
FramesPerSecondDenom4=1
AviPixelFormat4=7
AviCompression4=MP42 MS-MPEG4 V2
AviQuality4=100
FFmpegVideoCodecId4=13
FFmpegPixelFormat4=0
FFmpegQuality4=80
WmvVideoCodecName4=Windows Media Video V7
WmvQuality4=80
[GeneratedFilesSettings]
RelativeOutputPath2=C:\Users\Christos\Downloads\diot-sb-igl\.PDF
OpenOutputs2=0
RelativeOutputPath3=
OpenOutputs3=0
AddToProject3=1
TimestampFolder3=0
UseOutputName3=0
OpenODBOutput3=0
OpenGerberOutput3=0
OpenNCDrillOutput3=0
OpenIPCOutput3=0
EnableReload3=0
RelativeOutputPath4=
OpenOutputs4=0
hw/EDA-04326-V1-0_project.PrjPcb deleted 100644 → 0
View file @ c1ed54ef
This diff is collapsed.
hw/EDA-04326-V1-0_project.PrjPcbStructure deleted 100644 → 0
View file @ c1ed54ef
Record=TopLevelDocument|FileName=DIOT-sb-igl_top.SchDoc|SheetNumber=1
Record=SheetSymbol|SourceDocument=DIOT-sb-igl_top.SchDoc|Designator=CPCI-S P1-P3|SchDesignator=CPCI-S P1-P3|FileName=CPCI-S_Backplane_P1-P3.SchDoc|SheetNumber=12|SymbolType=Normal|RawFileName=CPCI-S_Backplane_P1-P3.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=DIOT-sb-igl_top.SchDoc|Designator=CPCI-S P4-P6|SchDesignator=CPCI-S P4-P6|FileName=CPCI-S_Backplane_P4-P6.SchDoc|SheetNumber=13|SymbolType=Normal|RawFileName=CPCI-S_Backplane_P4-P6.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=DIOT-sb-igl_top.SchDoc|Designator=FMC|SchDesignator=FMC|FileName=FMC.SchDoc|SheetNumber=14|SymbolType=Normal|RawFileName=FMC.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=DIOT-sb-igl_top.SchDoc|Designator=FPGA|SchDesignator=FPGA|FileName=FPGA.SchDoc|SheetNumber=3|SymbolType=Normal|RawFileName=FPGA.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=DIOT-sb-igl_top.SchDoc|Designator=JTAG|SchDesignator=JTAG|FileName=JTAG.SchDoc|SheetNumber=15|SymbolType=Normal|RawFileName=JTAG.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=DIOT-sb-igl_top.SchDoc|Designator=Monitoring|SchDesignator=Monitoring|FileName=Monitoring.SchDoc|SheetNumber=16|SymbolType=Normal|RawFileName=Monitoring.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=DIOT-sb-igl_top.SchDoc|Designator=Powering|SchDesignator=Powering|FileName=Powering.SchDoc|SheetNumber=2|SymbolType=Normal|RawFileName=Powering.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=DIOT-sb-igl_top.SchDoc|Designator=Top_Misc|SchDesignator=Top_Misc|FileName=Top_Misc.SchDoc|SheetNumber=17|SymbolType=Normal|RawFileName=Top_Misc.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA.SchDoc|Designator=Constrain Peripheral Board Nets|SchDesignator=Constrain Peripheral Board Nets|FileName=Constrain_Periph_Nets.SchDoc|SheetNumber=11|SymbolType=Normal|RawFileName=Constrain_Periph_Nets.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA.SchDoc|Designator=FPGA Banks 0,3,5,8|SchDesignator=FPGA Banks 0,3,5,8|FileName=FPGA_Banks_0_3_5_8.SchDoc|SheetNumber=6|SymbolType=Normal|RawFileName=FPGA_Banks_0_3_5_8.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA.SchDoc|Designator=FPGA Banks 1,2|SchDesignator=FPGA Banks 1,2|FileName=FPGA_Banks_1_2.SchDoc|SheetNumber=7|SymbolType=Normal|RawFileName=FPGA_Banks_1_2.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA.SchDoc|Designator=FPGA Banks 6,7|SchDesignator=FPGA Banks 6,7|FileName=FPGA_Banks_6_7.SchDoc|SheetNumber=10|SymbolType=Normal|RawFileName=FPGA_Banks_6_7.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA.SchDoc|Designator=FPGA Config|SchDesignator=FPGA Config|FileName=FPGA_Config.SchDoc|SheetNumber=5|SymbolType=Normal|RawFileName=FPGA_Config.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA.SchDoc|Designator=FPGA Power|SchDesignator=FPGA Power|FileName=FPGA_Power.SchDoc|SheetNumber=4|SymbolType=Normal|RawFileName=FPGA_Power.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA_Banks_1_2.SchDoc|Designator=MoniMod_I2C_Translation_SCL|SchDesignator=MoniMod_I2C_Translation_SCL|FileName=Translate_OD_3V3_to_2V5.SchDoc|SheetNumber=9|SymbolType=Normal|RawFileName=Translate_OD_3V3_to_2V5.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA_Banks_1_2.SchDoc|Designator=MoniMod_I2C_Translation_SDA|SchDesignator=MoniMod_I2C_Translation_SDA|FileName=Translate_OD_3V3_to_2V5.SchDoc|SheetNumber=9|SymbolType=Normal|RawFileName=Translate_OD_3V3_to_2V5.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA_Banks_1_2.SchDoc|Designator=PCB_VER_I2C_Translation_SCL|SchDesignator=PCB_VER_I2C_Translation_SCL|FileName=Translate_OD_3V3_to_2V5.SchDoc|SheetNumber=9|SymbolType=Normal|RawFileName=Translate_OD_3V3_to_2V5.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA_Banks_1_2.SchDoc|Designator=PCB_VER_I2C_Translation_SDA|SchDesignator=PCB_VER_I2C_Translation_SDA|FileName=Translate_OD_3V3_to_2V5.SchDoc|SheetNumber=9|SymbolType=Normal|RawFileName=Translate_OD_3V3_to_2V5.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA_Banks_1_2.SchDoc|Designator=Voltage_trans|SchDesignator=Voltage_trans|FileName=Translate_2V5_to_PPERIPH.SchDoc|SheetNumber=8|SymbolType=Normal|RawFileName=Translate_2V5_to_PPERIPH.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
hw/Schematics/CPCI-S_Backplane_P1-P3.Harness deleted 100644 → 0
View file @ c1ed54ef
CRT-GPIO=PRST_N,PWRBTN_N
I2C=SCL,SDA
MON-GPIO={I2C:I2C},P_RST_N,P_IO0,P_IO1,P_IO2,F_RST_N,F_IO0,F_IO1,PWR_FAIL_N,P_PRES0,P_PRES1
hw/Schematics/Constrain_Periph_Nets.Harness deleted 100644 → 0
View file @ c1ed54ef
PERIPH_CONN=LVDS_0_P,LVDS_0_N,LVDS_1_P,LVDS_1_N,LVDS_2_P,LVDS_2_N,LVDS_3_P,LVDS_3_N,LVDS_4_P,LVDS_4_N,LVDS_5_P,LVDS_5_N,LVDS_6_P,LVDS_6_N,LVDS_7_P,LVDS_7_N,LVDS_8_P,LVDS_8_N,LVDS_9_P,LVDS_9_N,LVDS_10_P,LVDS_10_N,LVDS_11_P,LVDS_11_N,LVDS_12_P,LVDS_12_N,LVDS_13_P,LVDS_13_N,LVDS_14_P,LVDS_14_N,LVDS_15_P,LVDS_15_N,LVDS_16_P,LVDS_16_N,LVDS_17_P,LVDS_17_N
hw/Schematics/FMC.Harness deleted 100644 → 0
View file @ c1ed54ef
FMC-CLKS=CLK0_M2C_P,CLK0_M2C_N,CLK1_M2C_P,CLK1_M2C_N
FMC-LA=D_N[33..0],D_P[33..0]
FMC-SIGS=PRSNT,{I2C:I2C},{LA:FMC-LA}
I2C=SCL,SDA
JTAG=TCK,TDI,TDO,TMS,TRST_N
MGT=GBTCLK_M2C_P,GBTCLK_M2C_N,DP_M2C_N,DP_M2C_P,DP_C2M_N,DP_C2M_P
hw/Schematics/FPGA_Banks_0_3_5_8.Harness deleted 100644 → 0
View file @ c1ed54ef
PERIPH_CONN=LVDS_0_P,LVDS_0_N,LVDS_1_P,LVDS_1_N,LVDS_2_P,LVDS_2_N,LVDS_3_P,LVDS_3_N,LVDS_4_P,LVDS_4_N,LVDS_5_P,LVDS_5_N,LVDS_6_P,LVDS_6_N,LVDS_7_P,LVDS_7_N,LVDS_8_P,LVDS_8_N,LVDS_9_P,LVDS_9_N,LVDS_10_P,LVDS_10_N,LVDS_11_P,LVDS_11_N,LVDS_12_P,LVDS_12_N,LVDS_13_P,LVDS_13_N,LVDS_14_P,LVDS_14_N,LVDS_15_P,LVDS_15_N,LVDS_16_P,LVDS_16_N,LVDS_17_P,LVDS_17_N
hw/Schematics/FPGA_Banks_1_2.Harness deleted 100644 → 0
View file @ c1ed54ef
CRT-GPIO=PRST_N,PWRBTN_N
FMC-LA=D_N[33..0],D_P[33..0]
FMC-SIGS=PRSNT,{I2C:I2C},{LA:FMC-LA}
I2C=SCL,SDA
MON-GPIO={I2C:I2C},P_RST_N,P_IO0,P_IO1,P_IO2,F_RST_N,F_IO0,F_IO1,PWR_FAIL_N,P_PRES0,P_PRES1
PGOOD_H=P1V2,P3V3,P12V
SPI=SS_N,SCLK,MOSI,MISO
hw/Schematics/FPGA_Banks_6_7.Harness deleted 100644 → 0
View file @ c1ed54ef
FMC-CLKS=CLK0_M2C_P,CLK0_M2C_N,CLK1_M2C_P,CLK1_M2C_N
FMC-LA=D_N[33..0],D_P[33..0]
FMC-SIGS=PRSNT,{I2C:I2C},{LA:FMC-LA}
I2C=SCL,SDA
MGT=GBTCLK_M2C_P,GBTCLK_M2C_N,DP_M2C_N,DP_M2C_P,DP_C2M_N,DP_C2M_P
hw/Schematics/FPGA_Config.Harness deleted 100644 → 0
View file @ c1ed54ef
JTAG=TCK,TDI,TDO,TMS,TRST_N
PGOOD_H=P1V2,P3V3,P12V
hw/Schematics/JTAG.Harness deleted 100644 → 0
View file @ c1ed54ef
FMC-LA=D_N[33..0],D_P[33..0]
FMC-SIGS=PRSNT,{I2C:I2C},{LA:FMC-LA}
I2C=SCL,SDA
JTAG=TCK,TDI,TDO,TMS,TRST_N
hw/Schematics/Powering.Harness deleted 100644 → 0
View file @ c1ed54ef
PGOOD_H=P1V2,P3V3,P12V
SENSE=P12V0+,P12V0-
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment