Commit f719436e authored by Christos Gentsos's avatar Christos Gentsos

Connect FPGA to peripheral boards

parent 5ad5ecd6
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PERIPH_CONN=S0_P,S0_N,S1_P,S1_N,S2_P,S2_N,S3_P,S3_N,S4_P,S4_N,S5_P,S5_N,S6_P,S6_N,S7_P,S7_N,S8_P,S8_N,S9_P,S9_N,S10_P,S10_N,S11_P,S11_N,S12_P,S12_N,S13_P,S13_N,S14_P,S14_N,S15_P,S15_N,S16_P,S16_N,S17_P,S17_N,SERVMOD_N
PERIPH_CONN=S0_P,S0_N,S1_P,S1_N,S2_P,S2_N,S3_P,S3_N,S4_P,S4_N,S5_P,S5_N,S6_P,S6_N,S7_P,S7_N,S8_P,S8_N,S9_P,S9_N,S10_P,S10_N,S11_P,S11_N,S12_P,S12_N,S13_P,S13_N,S14_P,S14_N,S15_P,S15_N,S16_P,S16_N,S17_P,S17_N
SPI=SS_N,SCLK,MOSI,MISO
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