Shorten cap pad to via distance and widen the traces (closes #82)

Also, improve FPGA decoupling (fit more caps near the pins, reposition others to minimize via sharing, etc)

Shorten cap pad to via distance and widen the traces (closes #82)
Also, improve FPGA decoupling (fit more caps near the pins, reposition others to minimize via sharing, etc)
e9febf58 · Christos Gentsos · 567a1aae · e9febf58
Commit e9febf58 authored May 25, 2021 by Christos Gentsos
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EDA-04326-V1-0_pcb.PcbDoc hw/PCB-Layout/EDA-04326-V1-0_pcb.PcbDoc +0 -0

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--- a/hw/PCB-Layout/EDA-04326-V1-0_pcb.PcbDoc
+++ b/hw/PCB-Layout/EDA-04326-V1-0_pcb.PcbDoc