Rename peripheral board nets to match the non-rad-tol system board

53d94fb7 · Christos Gentsos · 91d2842b · 53d94fb7 · 53d94fb7 · 53d94fb7
Commit 53d94fb7 authored Oct 01, 2020 by Christos Gentsos
5 changed files
--- a/hw/DIOT-sb-igl.pdf
+++ b/hw/DIOT-sb-igl.pdf
--- a/hw/Schematics/CPCI-S_Backplane_P1-P3.SchDoc
+++ b/hw/Schematics/CPCI-S_Backplane_P1-P3.SchDoc
--- a/hw/Schematics/CPCI-S_Backplane_P4-P6.SchDoc
+++ b/hw/Schematics/CPCI-S_Backplane_P4-P6.SchDoc
--- a/hw/Schematics/FPGA_Banks_0_3_5_8.Harness
+++ b/hw/Schematics/FPGA_Banks_0_3_5_8.Harness
-PERIPH_CONN=S0_P,S0_N,S1_P,S1_N,S2_P,S2_N,S3_P,S3_N,S4_P,S4_N,S5_P,S5_N,S6_P,S6_N,S7_P,S7_N,S8_P,S8_N,S9_P,S9_N,S10_P,S10_N,S11_P,S11_N,S12_P,S12_N,S13_P,S13_N,S14_P,S14_N,S15_P,S15_N,S16_P,S16_N,S17_P,S17_N
+PERIPH_CONN=LVDS_0_P,LVDS_0_N,LVDS_1_P,LVDS_1_N,LVDS_2_P,LVDS_2_N,LVDS_3_P,LVDS_3_N,LVDS_4_P,LVDS_4_N,LVDS_5_P,LVDS_5_N,LVDS_6_P,LVDS_6_N,LVDS_7_P,LVDS_7_N,LVDS_8_P,LVDS_8_N,LVDS_9_P,LVDS_9_N,LVDS_10_P,LVDS_10_N,LVDS_11_P,LVDS_11_N,LVDS_12_P,LVDS_12_N,LVDS_13_P,LVDS_13_N,LVDS_14_P,LVDS_14_N,LVDS_15_P,LVDS_15_N,LVDS_16_P,LVDS_16_N,LVDS_17_P,LVDS_17_N
--- a/hw/Schematics/FPGA_Banks_0_3_5_8.SchDoc
+++ b/hw/Schematics/FPGA_Banks_0_3_5_8.SchDoc