Use proper current sense resistors, use 2V5 for PLLs

14e7d6a5 · Christos Gentsos · b585023e · 14e7d6a5 · 14e7d6a5 · 14e7d6a5
Commit 14e7d6a5 authored Oct 09, 2020 by Christos Gentsos
5 changed files
--- a/hw/DIOT-sb-igl.pdf
+++ b/hw/DIOT-sb-igl.pdf
--- a/hw/Schematics/CPCI-S_Backplane_P1-P3.SchDoc
+++ b/hw/Schematics/CPCI-S_Backplane_P1-P3.SchDoc
--- a/hw/Schematics/FPGA_Banks_6_7.SchDoc
+++ b/hw/Schematics/FPGA_Banks_6_7.SchDoc
--- a/hw/Schematics/FPGA_Power.SchDoc
+++ b/hw/Schematics/FPGA_Power.SchDoc
--- a/hw/Schematics/Powering.SchDoc
+++ b/hw/Schematics/Powering.SchDoc