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DIOT Peripheral Board Loop-back
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Last edited by Grzegorz Daniluk May 12, 2022
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DI/OT Peripheral Board Loop-back

Project description

Simple DI/OT Peripheral Board Loop-back to test all connections of DI/OT System Boards during production screening and other reliability tests.

DIOT_PB_LBPK

Main features

  • Loop-back of all lines coming from DI/OT backplane
  • Optional load resistors for 12V and 5V power rails
  • Identification EEPROM
  • Assembly variants for any System Board RTM loopback or Peripheral Board RTM loopback

Related links and documents

  • Board schematics in pdf

Contacts

  • Greg Daniluk - CERN

Status

Date Event
11-May-202 Project starts

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