[EDA-04213-V3]: stackup
reported by Tom: "I would swap the power plane on bottom layer with L2. We don't have any SI requirements here and I'm feeling a bit uneasy with having a high current capacity surface on the outer layers (short circuits)"
reported by Tom: "I would swap the power plane on bottom layer with L2. We don't have any SI requirements here and I'm feeling a bit uneasy with having a high current capacity surface on the outer layers (short circuits)"