Skip to content

DIOT CompactPCI Serial crate hardware
DIOT CompactPCI Serial crate hardware
Commit 6fe88881 authored by Michal Gaska's avatar Michal Gaska
Browse files
Options

last changes

parent fd3cfe09
Expand all Hide whitespace changes
Inline Side-by-side
Showing with 137653 additions and 136383 deletions
pcb/cpcis_backplane/CPCI Backplane.kicad_pcb
View file @ 6fe88881
This diff is collapsed.
pcb/cpcis_backplane/CPCI Backplane.pro
View file @ 6fe88881
update=28.10.2019 17:37:22
update=16.12.2019 15:04:17
version=1
last_client=kicad
[general]
......@@ -39,8 +39,8 @@ MinMicroViaDiameter=0.2
MinMicroViaDrill=0.09999999999999999
MinHoleToHole=0.25
TrackWidth1=0.102
ViaDiameter1=0.4
ViaDrill1=0.2
ViaDiameter1=0.75
ViaDrill1=0.5
dPairWidth1=0.102
dPairGap1=0.127
dPairViaGap1=0.25
......@@ -248,8 +248,8 @@ Enabled=0
Name=Default
Clearance=0.102
TrackWidth=0.102
ViaDiameter=0.4
ViaDrill=0.2
ViaDiameter=0.75
ViaDrill=0.5
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.102
......@@ -259,8 +259,8 @@ dPairViaGap=0.25
Name=CLK_diff
Clearance=0.102
TrackWidth=0.102
ViaDiameter=0.4
ViaDrill=0.2
ViaDiameter=0.75
ViaDrill=0.5
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.102
......@@ -270,8 +270,8 @@ dPairViaGap=0.25
Name=Diff
Clearance=0.102
TrackWidth=0.102
ViaDiameter=0.4
ViaDrill=0.2
ViaDiameter=0.75
ViaDrill=0.5
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.102
......@@ -281,8 +281,8 @@ dPairViaGap=0.25
Name=MGT
Clearance=0.102
TrackWidth=0.25
ViaDiameter=0.4
ViaDrill=0.2
ViaDiameter=0.75
ViaDrill=0.5
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.15
......@@ -292,8 +292,8 @@ dPairViaGap=0.25
Name=high_curr
Clearance=0.102
TrackWidth=0.102
ViaDiameter=0.5
ViaDrill=0.3
ViaDiameter=0.75
ViaDrill=0.5
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.102
......
pcb/cpcis_backplane/CPCI Backplane.sch
View file @ 6fe88881
This diff is collapsed.
pcb/cpcis_backplane/Power.sch-bak
View file @ 6fe88881
......@@ -351,11 +351,7 @@ F 3 "" H 12500 5050 50 0001 C CNN
0 1 1 0
$EndComp
Wire Notes Line
2900 3550 2900 6800
Wire Notes Line
2900 6800 5100 6800
Wire Notes Line
5100 6800 5100 3550
2900 6100 5100 6100
Wire Notes Line
5100 3550 2900 3550
Wire Notes Line
......@@ -1170,6 +1166,10 @@ F 38 "This work is licensed under the Creative Commons CC-BY-SA 4.0 License. To
1 4300 4000
1 0 0 -1
$EndComp
Wire Notes Line
5100 3550 5100 6100
Wire Notes Line
2900 3550 2900 6100
Wire Bus Line
3250 3850 3250 5100
$EndSCHEMATC
pcb/cpcis_backplane/_autosave-Power.sch 0 → 100644
View file @ 6fe88881
This diff is collapsed.
pcb/cpcis_backplane/fp-info-cache
View file @ 6fe88881
This diff is collapsed.
pcb/power_backplane/Power Backplane-rescue.lib
View file @ 6fe88881
......@@ -31,6 +31,88 @@ X P5V 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# SW_OMRON_A6H-4102-Switches
#
DEF SW_OMRON_A6H-4102-Switches SW 0 50 Y Y 1 L N
F0 "SW" 200 50 50 H V C CNN
F1 "SW_OMRON_A6H-4102-Switches" 0 -575 50 H I L CNN
F2 "Switches:SW_OMRON_A6H-4102" 0 -650 50 H I L CNN
F3 " " 0 -725 50 H I L CNN
F4 "Switch" 200 -80 50 H I R CNN "Family"
F5 "SW_OMRON_A6H-4102" 0 -800 50 H I L CNN "Part Number"
F6 "SW 4x SPST DIP Switch" 0 -875 50 H I L CNN "Library Ref"
F7 "SchLib\\Switches.SchLib" 0 -950 50 H I L CNN "Library Path"
F8 " " 0 -1025 50 H I L CNN "Comment"
F9 "Standard" 0 -1100 50 H I L CNN "Component Kind"
F10 "Standard" 0 -1175 50 H I L CNN "Component Type"
F11 "8" 0 -1250 50 H I L CNN "Pin Count"
F12 " " 0 -1325 50 H I L CNN "Case"
F13 "PcbLib\\Switches.PcbLib" 0 -1400 50 H I L CNN "Footprint Path"
F14 "SW_OMRON_A6H-4102" 0 -1475 50 H I L CNN "Footprint Ref"
F15 "Pitch 1.27mm, Body 6.31 x 4.5mm, 4 Ways SPST Surface-Mounting DIP Switch, OMRON A6H" 0 -1550 50 H I L CNN "PackageDescription"
F16 "Switch" 0 -1625 50 H I L CNN "Family"
F17 "Yes" 0 -1700 50 H I L CNN "Mounted"
F18 "No" 0 -1775 50 H I L CNN "Socket"
F19 "Yes" 0 -1850 50 H I L CNN "SMD"
F20 "No" 0 -1925 50 H I L CNN "PressFit"
F21 "No" 0 -2000 50 H I L CNN "Sense"
F22 " " 0 -2075 50 H I L CNN "Sense Comment"
F23 "None" 0 -2150 50 H I L CNN "Status"
F24 " " 0 -2225 50 H I L CNN "Status Comment"
F25 " " 0 -2300 50 H I L CNN "SCEM"
F26 "4 Ways Ultra-low Profile, Half-pitch, SPST DIP Switch With Seal Tape, Rating 25mA 24VDC" 0 -2375 50 H I L CNN "Part Description"
F27 "OMRON" 0 -2450 50 H I L CNN "Manufacturer"
F28 "A6H-4102" 0 -2525 50 H I L CNN "Manufacturer Part Number"
F29 "1.45mm" 0 -2600 50 H I L CNN "ComponentHeight"
F30 " " 0 -2675 50 H I L CNN "Manufacturer1 Example"
F31 " " 0 -2750 50 H I L CNN "Manufacturer1 Part Number"
F32 " " 0 -2825 50 H I L CNN "Manufacturer1 ComponentHeight"
F33 " " 0 -2900 50 H I L CNN "ComponentLink1Description"
F34 " " 0 -2975 50 H I L CNN "ComponentLink2Description"
F35 "CERN DEM JLC" 0 -3050 50 H I L CNN "Author"
F36 "12/17/13 00:00:00" 0 -3125 50 H I L CNN "CreateDate"
F37 "12/17/13 00:00:00" 0 -3200 50 H I L CNN "LatestRevisionDate"
F38 "Switches" 0 -3275 50 H I L CNN "Database Table Name"
F39 "Eletro-mechanical.DbLib" 0 -3350 50 H I L CNN "Library Name"
F40 "Switches" 0 -3425 50 H I L CNN "Footprint Library"
F41 "This work is licensed under the Creative Commons CC-BY-SA 4.0 License. To the extent that circuit schematics that use Licensed Material can be considered to be ‘Adapted Material’, then the copyright holder waives article 3.b of the license with respect to these schematics." 0 -3500 50 H I L CNN "License"
DRAW
C 100 -400 20 0 1 0 N
C 100 -300 20 0 1 0 N
C 100 -200 20 0 1 0 N
C 100 -100 20 0 1 0 N
C 300 -400 20 0 1 0 N
C 300 -300 20 0 1 0 N
C 300 -200 20 0 1 0 N
C 300 -100 20 0 1 0 N
T 0 190 -40 40 1 0 1 1 Normal 0 C C
T 0 190 -130 40 1 0 1 2 Normal 0 C C
T 0 190 -230 40 1 0 1 3 Normal 0 C C
T 0 190 -330 40 1 0 1 4 Normal 0 C C
S 0 -500 400 0 0 1 0 f
P 2 0 1 10 0 -400 80 -400 N
P 2 0 1 10 0 -300 80 -300 N
P 2 0 1 10 0 -200 80 -200 N
P 2 0 1 10 0 -100 80 -100 N
P 2 0 1 10 280 -350 120 -390 N
P 2 0 1 10 280 -250 120 -290 N
P 2 0 1 10 280 -150 120 -190 N
P 2 0 1 10 280 -50 120 -90 N
P 2 0 1 10 320 -400 400 -400 N
P 2 0 1 10 320 -300 400 -300 N
P 2 0 1 10 320 -200 400 -200 N
P 2 0 1 10 320 -100 400 -100 N
X 1 1 -200 -100 200 R 60 0 0 1 B
X 2 2 -200 -200 200 R 60 0 0 1 B
X 3 3 -200 -300 200 R 60 0 0 1 B
X 4 4 -200 -400 200 R 60 0 0 1 B
X 5 5 600 -400 200 L 60 0 0 1 B
X 6 6 600 -300 200 L 60 0 0 1 B
X 7 7 600 -200 200 L 60 0 0 1 B
X 8 8 600 -100 200 L 60 0 0 1 B
ENDDRAW
ENDDEF
#
# WURTH_7461057-Fasteners_&_Fixings
#
DEF WURTH_7461057-Fasteners_&_Fixings BUSH 0 50 Y Y 1 L N
......
pcb/power_backplane/Power Backplane.pro
View file @ 6fe88881
update=13.11.2019 17:08:49
update=19.12.2019 13:46:49
version=1
last_client=kicad
[general]
......@@ -27,7 +27,7 @@ version=1
PageLayoutDescrFile=
LastNetListRead=
CopperLayerCount=4
BoardThickness=1.6
BoardThickness=4
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
......@@ -39,8 +39,8 @@ MinMicroViaDiameter=0.2
MinMicroViaDrill=0.09999999999999999
MinHoleToHole=0.25
TrackWidth1=0.25
ViaDiameter1=0.8
ViaDrill1=0.4
ViaDiameter1=0.75
ViaDrill1=0.5
dPairWidth1=0.2
dPairGap1=0.25
dPairViaGap1=0.25
......@@ -239,8 +239,8 @@ Enabled=0
Name=Default
Clearance=0.2
TrackWidth=0.25
ViaDiameter=0.8
ViaDrill=0.4
ViaDiameter=0.75
ViaDrill=0.5
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2
......
pcb/power_backplane/Power Backplane.sch
View file @ 6fe88881
This diff is collapsed.
pcb/power_backplane/Power Backplane.sch-bak
View file @ 6fe88881
This diff is collapsed.
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment