Here are our current LTSpice models for the front end. If you have any
comments or observations please share them!
The model consists of three main blocks:
Transimpedence front end amplifier
Two stage signal amplifier + Pulse shaping network
Items not modeled:
Vbias + Bias resistor
ADC input (simulated with a 50 ohm resistor)
4V DC/DC converter for front end
Note - all amplifiers are run from the 4V rail, rather than the 5V USB
rail to improve noise immunity.
AC transient with 5ns rise and 34ns fall time (+/-) with 1V magnitude.