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Conv TTL RS485 - Testing
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Conv TTL RS485 - Testing
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d229823c
Commit
d229823c
authored
Nov 17, 2014
by
Theodor-Adrian Stana
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sw: Commented RS485 test script better
parent
dd22c4b2
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rs485_pulse_rtm.py
pts/python/rs485_pulse_rtm.py
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pts/python/rs485_pulse_rtm.py
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d229823c
##_______________________________________________________________________________________________
##
## CONV-TTL-RS485 PTS
##
## CERN,BE/CO-HT
##_______________________________________________________________________________________________
##
##-----------------------------------------------------------------------------------------------
##
## CONV-TTL-RS485 LEDs test
##
##-----------------------------------------------------------------------------------------------
##
## Description Testing the rear-transition module interface of the CONV-TTL-RS485 front module
## board. This is done in conjunction with gateware implemented on the
## CONV-TTL-RS485 FPGA.
##
## The gateware implements pulse repeaters which are controlled by this script to
## send pulses back to inputs. Externally to the RTM, there should be two boards
## containing differential multiplexers, and these are controlled by the FPGA HDL
## through this script such that each channel sends pulses back to itself, in the
## sequence O1->I, O2->I, O3->I.
##
## In short, what this script does is to turn on pulse repetition, sleep for a
## predefined amount of time, and then check that the same number of pulses that has
## been sent at the channel output are received at its input. The checking is done by
## reading the input and output channel pulse counters, implemented in the FPGA HDL.
## Checking is done with input and output terminations ON and OFF (one run of the same
## test sequence for both).
##
## Authors Julian Lewis (Julian.Lewis@cern.ch)
## Theodor-Adrian Stana (t.stana@cern.ch)
## Website http://www.ohwr.org/projects/pts
## Date 11/11/2014
##-----------------------------------------------------------------------------------------------
##
##------------------------------------------------------------------------------------------------
## GNU LESSER GENERAL PUBLIC LICENSE
## ------------------------------------
## This source file is free software; you can redistribute it and/or modify it under the terms of
## the GNU Lesser General Public License as published by the Free Software Foundation; either
## version 2.1 of the License, or (at your option) any later version.
## This source is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
## without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
## See the GNU Lesser General Public License for more details.
## You should have received a copy of the GNU Lesser General Public License along with this
## source; if not, download it from http://www.gnu.org/licenses/lgpl-2.1.html
##-------------------------------------------------------------------------------------------------
# Import system modules
import
sys
sys
.
path
.
append
(
"pyts"
)
...
...
@@ -8,6 +56,9 @@ from ptsexcept import *
from
vv_pts
import
*
from
ptsdefine
import
*
#--------------------------------------------------------------------------------------------------
# Pulse counter class
#--------------------------------------------------------------------------------------------------
class
CPulseCounter
:
def
__init__
(
self
,
bus
,
base
):
...
...
@@ -32,6 +83,9 @@ class CPulseCounter:
def
rd_in_cnt
(
self
,
chan
):
return
self
.
rd_reg
((
chan
-
1
)
*
8
+
4
)
#--------------------------------------------------------------------------------------------------
# Test sequences
#--------------------------------------------------------------------------------------------------
def
mux_sel
(
bus
,
sel
):
val
=
bus
.
vv_read
(
CSR
)
val
&=
~
(
1
<<
CSR_TESTER_MUX_S0_OFS
)
...
...
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