Commit a3a4db02 authored by Theodor-Adrian Stana's avatar Theodor-Adrian Stana

sw: Added description to flashtest.py and made it more configurable

parent 25af4d2e
......@@ -11,8 +11,13 @@
##
##-----------------------------------------------------------------------------------------------
##
## Description FILL ME!!! FILL ME!!! FILL ME!!! FILL ME!!! FILL ME!!! FILL ME!!! FILL ME!!!
##
## Description This test checks that the release and golden gatewares downloaded to the FPGA are
## the proper version. A gateware download is performed by pts.py prior to this
## script being run. This script is then run to check that the release gateware the
## FPGA boots up to is the correct version. MultiBoot is then performed via the FPGA
## gateware and the gateware version of the golden gateware is checked for
## correctness.
##
##
## Authors Julian Lewis (Julian.Lewis@cern.ch)
## Theodor-Adrian Stana (t.stana@cern.ch)
......@@ -64,6 +69,9 @@ def main(bus,tname,inf,log):
uses : golden-v0.0_release-v1.0.bit and flashtest.py
"""
RELEASE_GWVERS = 3.0
GOLDEN_GWVERS = 0.2
pel = PTS_ERROR_LOGGER(inf,log)
try:
......@@ -93,11 +101,11 @@ def main(bus,tname,inf,log):
gwvers = maj + min
# and now check if appropriate
if (gwvers == 1.0):
if (gwvers == RELEASE_GWVERS):
msg = "Release gateware version correct: %2.*f\n" % (p, gwvers)
inf.write(msg)
else:
msg = "ERROR: Release gateware version (%2.*f) incorrect - expected 1.0" % (p, gwvers)
msg = "ERROR: Release gateware version (%2.*f) incorrect - expected %f" % (p, gwvers, RELEASE_GWVERS)
pel.set(msg)
# Fall-back to golden addres by performing IPROG from wrong address
......@@ -135,11 +143,11 @@ def main(bus,tname,inf,log):
gwvers = maj + min
# and now check if appropriate
if (gwvers == 0.0):
if (gwvers == GOLDEN_GWVERS):
msg = "Golden gateware version correct: %2.*f\n" % (p, gwvers)
inf.write(msg)
else:
msg = "ERROR: Golden gateware version (%2.*f) incorrect - expected 0.0" % (p, gwvers)
msg = "ERROR: Golden gateware version (%2.*f) incorrect - expected %f" % (p, gwvers, GOLDEN_GWVERS)
pel.set(msg)
# FPGA up from booting, end the loop
......
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