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Conv TTL RS485 - Testing
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Conv TTL RS485 - Testing
Commits
25af4d2e
Commit
25af4d2e
authored
Nov 12, 2014
by
Theodor-Adrian Stana
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sw: Added termination enable to RS485 pulse test and ptsdefine.py
parent
841b6972
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3 changed files
with
102 additions
and
5 deletions
+102
-5
Makefile
pts/Makefile
+1
-1
ptsdefine.py
pts/python/ptsdefine.py
+5
-0
rs485_pulse.py
pts/python/rs485_pulse.py
+96
-4
No files found.
pts/Makefile
View file @
25af4d2e
...
...
@@ -36,7 +36,7 @@ all:
ln
-s
tests/sfp_eeprom.py
pts-conv-ttl-rs485/test06.py
ln
-s
tests/sfp_test.py
pts-conv-ttl-rs485/test07.py
wget -P pts-conv-ttl-rs485/boot http
:
//www.ohwr.org/attachments/download/36
68
/pts.bit
wget -P pts-conv-ttl-rs485/boot http
:
//www.ohwr.org/attachments/download/36
71
/pts.bit
wget
-P
pts-conv-ttl-rs485/boot http://www.ohwr.org/attachments/download/3650/flash_load.bit
wget
-P
pts-conv-ttl-rs485/boot http://www.ohwr.org/attachments/download/3657/golden-v0.0_release-v1.0.bin
...
...
pts/python/ptsdefine.py
View file @
25af4d2e
...
...
@@ -70,6 +70,11 @@ LSR_FRONTINV_OFS = 6
LSR_REAR_OFS
=
10
LSR_REARFS_OFS
=
26
# Termination Enable Register
TER
=
0x00c
TER_ITERM_OFS
=
0
TER_OTERM_OFS
=
6
# 1-Wire base address, used in therm_id.py
TEMP_1WIRE_BASE
=
0x010
...
...
pts/python/rs485_pulse.py
View file @
25af4d2e
...
...
@@ -119,6 +119,10 @@ def main(bus, tname, inf, log):
val
|=
(
1
<<
CSR_TESTER_VCC_OFS
)
bus
.
vv_write
(
CSR
,
val
)
#---------------------------
# Test with terminations OFF
#---------------------------
# Read out fail-safe lines -- should now be high, since the MUXes are
# powered but not enabled
val
=
bus
.
vv_read
(
LSR
)
...
...
@@ -137,7 +141,7 @@ def main(bus, tname, inf, log):
bus
.
vv_write
(
CSR
,
val
)
# Generate pulses from different outputs to inputs
msg
=
"Testing channel connections: O1 -> I"
msg
=
"Testing channel connections
(term. OFF)
: O1 -> I"
print
(
msg
)
mux_sel
(
bus
,
0x0
)
inf
.
write
(
'
\n
'
)
...
...
@@ -148,7 +152,7 @@ def main(bus, tname, inf, log):
check_counters
(
pc
,
inf
,
pel
)
clear_counters
(
pc
)
msg
=
"Testing channel connections: O2 -> I"
msg
=
"Testing channel connections
(term. OFF)
: O2 -> I"
print
(
msg
)
mux_sel
(
bus
,
0x1
)
inf
.
write
(
'
\n
'
)
...
...
@@ -159,7 +163,7 @@ def main(bus, tname, inf, log):
check_counters
(
pc
,
inf
,
pel
)
clear_counters
(
pc
)
msg
=
"Testing channel connections: O3 -> I"
msg
=
"Testing channel connections
(term. OFF)
: O3 -> I"
print
(
msg
)
mux_sel
(
bus
,
0x2
)
inf
.
write
(
'
\n
'
)
...
...
@@ -170,7 +174,7 @@ def main(bus, tname, inf, log):
check_counters
(
pc
,
inf
,
pel
)
clear_counters
(
pc
)
msg
=
"Testing RS-485 fail-safe on short-circuit case"
msg
=
"Testing RS-485 fail-safe on short-circuit case
(term. OFF)
"
print
(
msg
)
mux_sel
(
bus
,
0x3
)
inf
.
write
(
'
\n
'
)
...
...
@@ -184,6 +188,94 @@ def main(bus, tname, inf, log):
msg
=
"ERROR: Failsafe lines readout (0x
%02
X) incorrect - expected 0x3F"
%
val
pel
.
set
(
msg
)
# Disable multiplexer
print
(
"Disabling multiplexers"
)
val
=
bus
.
vv_read
(
CSR
)
val
&=
~
(
1
<<
CSR_TESTER_MUX_EN_OFS
)
bus
.
vv_write
(
CSR
,
val
)
#--------------------------
# Test with terminations ON
#--------------------------
# Read out fail-safe lines -- should now be high, since the MUXes are
# powered but not enabled
val
=
bus
.
vv_read
(
LSR
)
val
>>=
LSR_REARFS_OFS
if
(
val
==
0x3f
):
msg
=
"RS-485 failsafe lines read as expected: 0x
%02
X
\n
"
%
val
inf
.
write
(
msg
)
else
:
msg
=
"ERROR: Failsafe lines readout (0x
%02
X) incorrect - expected 0x3F"
%
val
pel
.
set
(
msg
)
inf
.
write
(
'
\n
'
)
msg
=
"Enabling input and output terminations"
print
(
msg
)
inf
.
write
(
msg
+
'
\n
'
)
bus
.
vv_write
(
TER
,
(
0x3f
<<
TER_OTERM_OFS
)
|
(
0x3f
<<
TER_ITERM_OFS
))
time
.
sleep
(
2
)
# Enable multiplexer
print
(
"Enabling multiplexers"
)
val
=
bus
.
vv_read
(
CSR
)
val
|=
(
1
<<
CSR_TESTER_MUX_EN_OFS
)
bus
.
vv_write
(
CSR
,
val
)
# Generate pulses from different outputs to inputs
msg
=
"Testing channel connections (term. ON): O1 -> I"
print
(
msg
)
mux_sel
(
bus
,
0x0
)
inf
.
write
(
'
\n
'
)
inf
.
write
(
msg
+
'
\n
'
)
en_pulse_gen
(
bus
)
time
.
sleep
(
2
)
dis_pulse_gen
(
bus
)
check_counters
(
pc
,
inf
,
pel
)
clear_counters
(
pc
)
msg
=
"Testing channel connections (term. ON): O2 -> I"
print
(
msg
)
mux_sel
(
bus
,
0x1
)
inf
.
write
(
'
\n
'
)
inf
.
write
(
msg
+
'
\n
'
)
en_pulse_gen
(
bus
)
time
.
sleep
(
2
)
dis_pulse_gen
(
bus
)
check_counters
(
pc
,
inf
,
pel
)
clear_counters
(
pc
)
msg
=
"Testing channel connections (term. ON): O3 -> I"
print
(
msg
)
mux_sel
(
bus
,
0x2
)
inf
.
write
(
'
\n
'
)
inf
.
write
(
msg
+
'
\n
'
)
en_pulse_gen
(
bus
)
time
.
sleep
(
2
)
dis_pulse_gen
(
bus
)
check_counters
(
pc
,
inf
,
pel
)
clear_counters
(
pc
)
msg
=
"Testing RS-485 fail-safe on short-circuit case (term. ON)"
print
(
msg
)
mux_sel
(
bus
,
0x3
)
inf
.
write
(
'
\n
'
)
inf
.
write
(
msg
+
'
\n
'
)
val
=
bus
.
vv_read
(
LSR
)
val
>>=
LSR_REARFS_OFS
if
(
val
==
0x3f
):
msg
=
"RS-485 failsafe lines read as expected: 0x
%02
X
\n
"
%
val
inf
.
write
(
msg
)
else
:
msg
=
"ERROR: Failsafe lines readout (0x
%02
X) incorrect - expected 0x3F"
%
val
pel
.
set
(
msg
)
# Disable multiplexer
print
(
"Disabling multiplexers"
)
val
=
bus
.
vv_read
(
CSR
)
val
&=
~
(
1
<<
CSR_TESTER_MUX_EN_OFS
)
bus
.
vv_write
(
CSR
,
val
)
return
pel
.
get
()
except
BusException
,
e
:
...
...
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