• Theodor-Adrian Stana's avatar
    hdl: Additions to rear test logic · 30f02bf6
    Theodor-Adrian Stana authored
    The additions are:
    - checking the fail-safe lines before passing the input pulse to the pulse
      counters
    - adding a delay to the pulse generators, to account for hardware delay
      appearing on enable
    30f02bf6
pts.vhd 84.8 KB