Release is compatible with the new 2 channel RTM
The RTM reuses RS485 transceivers from different channels and reassigns
them to channel 1 and 2 inputs and each of their 5 outputs.
CHANGES MEMORY MAP FROM PREVIOUS VERSIONS
Error bits are moved from SR to a dedicated register ERR
Added hardware version bits & changed WRPRES bit location in SR
Added failsafe state bits to LSR
Separate counters for TTL & RS-485 signals
OSWR (Other switch register)
UIDLR & UIDHR (Thermometer 64-bit Unique ID, high and low 32
TEMPR (Board Temperature Register)
Backward-compatible with v3 boards and earlier, while bringing in
some additional features.
Features available in all hardware versions of the board:*
PCB version recognition available at the FPGA as 6 bits (4 bits for
the version number and 2 bits for the revision) and for diagnostics
via the status register SR. For older boards (v3 and below), SR
register will indicate 0, as there are no resistors to indicate the
Changes in memory map:
One-wire thermometer no longer accessible via one-wire master,
Temperature is available in single register as 16-bit value.
Temperature = 0d(TEMPR)/16.
One-wire chip unique 64-bit ID stored in two 32-bit
registers, readable from registers UIDLR and UIDHR.
Separate pulse counters for TTL and for RS-485 inputs, therefore
two pulse counters per channel, CHxFPPCR and CHxRPPCR.
Error data moved from SR (status register) to own ERR register.