Commit 82bc89b2 authored by Denia Bouhired-Ferrag's avatar Denia Bouhired-Ferrag

further merge of simulations with remote branch

parents 771ca3df ed12cb0e
This diff is collapsed.
......@@ -47,7 +47,8 @@ package testbench_pkg is
constant C_NR_MASTERS : positive := 1;
constant C_NR_SLAVES : positive := 1;
constant C_RTM : std_logic_vector(5 downto 0) := "010101";
constant C_NO_RTM : std_logic_vector(5 downto 0) := "000000";
constant C_RTM_DB9 : std_logic_vector(5 downto 0) := "000101";
constant C_INITIAL_TST_VALUE : std_logic_vector(31 downto 0) := x"FFFFFFF0";
constant C_I2C_MASTER_SLV_ADDR: std_logic_vector(6 downto 0) := "1011110";
......@@ -259,6 +260,7 @@ end component conv_ttl_rs485;
procedure settings_config (constant glitch_filter_en : in std_logic;
constant ttl_out_bar_en : in std_logic;
constant rtm_value : in std_logic_vector(5 downto 0);
signal sw_gp_n : out std_logic_vector(7 downto 0);
signal sw_other : out std_logic_vector(31 downto 0);
signal pcbrev : out std_logic_vector(5 downto 0);
......@@ -297,23 +299,30 @@ package body testbench_pkg is
--==================================================================================================
procedure settings_config (constant glitch_filter_en : in std_logic;
constant ttl_out_bar_en : in std_logic;
signal sw_gp_n : out std_logic_vector(7 downto 0);
signal sw_other : out std_logic_vector(31 downto 0);
signal pcbrev : out std_logic_vector(5 downto 0);
signal rtm : out std_logic_vector(5 downto 0)) is
constant rtm_value : in std_logic_vector(5 downto 0);
signal sw_gp_n : out std_logic_vector(7 downto 0);
signal sw_other : out std_logic_vector(31 downto 0);
signal pcbrev : out std_logic_vector(5 downto 0);
signal rtm : out std_logic_vector(5 downto 0)) is
begin
sw_gp_n(0) <= not glitch_filter_en;
if glitch_filter_en = '1' then
print_now("Glitch filter enabled");
print_now("- Glitch filter enabled");
else
print_now("Glitch filter disabled");
print_now("- Glitch filter disabled");
end if;
sw_gp_n(7) <= ttl_out_bar_en;
if ttl_out_bar_en = '1' then
print_now("TTL output BAR enabled");
print_now("- TTL output BAR enabled");
else
print_now("- TTL output BAR disabled");
end if;
if rtm_value = C_RTM_DB9 then
print_now("- DB9 RTM plugged in");
else
print_now("TTL output BAR disabled");
print_now("- No particular RTM");
end if;
--print_now_s_std("RTMP & RTMM set to x", C_RTM);
......@@ -321,7 +330,9 @@ package body testbench_pkg is
sw_gp_n(6 downto 1) <= (others => '0'); -- not used
sw_other <= (others => '0'); -- not used
pcbrev <= "111100"; -- not used
rtm <= C_RTM; -- not used
rtm <= rtm_value;
end procedure;
----------------------------------------------------------------------------------------------------
......
......@@ -49,6 +49,7 @@ use work.wishbone_pkg.all;
use work.conv_common_gw_pkg.all;
entity conv_ttl_rs485 is
generic (g_simul : boolean := FALSE);
port
(
-- Clocks
......@@ -280,8 +281,6 @@ begin
rs485_fs(i) <= rs485_n_i(i) nor rs485_fs_n_i(i);
pulse_rs485_mapped(i) <= (not rs485_n_i(i)) when rs485_fs(i) = '0' else '0';
pulse_rs485(0) <= pulse_rs485_mapped(0);
pulse_rs485(1) <= pulse_rs485_mapped(4) when rtmp_i = "101" else pulse_rs485_mapped(1);
pulse_rs485(2) <= pulse_rs485_mapped(2) when rtmp_i = "101" else pulse_rs485_mapped(2);
......@@ -345,7 +344,7 @@ begin
cmp_conv_common : conv_common_gw
generic map
(
g_simul => g_simul,
g_nr_chans => c_nr_chans,
g_board_id => c_board_id,
g_gwvers => c_gwvers,
......@@ -480,7 +479,6 @@ begin
bicolor_led_line_oen_o => bicolor_led_line_oen
);
ttl_o <= pulse_out when sw_ttl = '1' else
not pulse_out;
-- rs485_o (1 downto 0) <= pulse_out (1 downto 0);
......@@ -493,7 +491,6 @@ begin
-- channel 4 copies channel 2
-- rs485_o (3 downto 2) <= pulse_out (1 downto 0) when rtmp_i = "101" or rtmp_i = "100"
-- else pulse_out (3 downto 2);
-- rs485_o (5 downto 4) <= pulse_out (5 downto 4);
--============================================================================
......@@ -507,8 +504,6 @@ begin
rs485_o(4) <= pulse_out(1) when rtmp_i = "101" else pulse_out(4);
rs485_o(5) <= pulse_out(1) when rtmp_i = "101" else pulse_out(5);
-- LED outputs
-- Boards earlier than v4 do not use -ve logic for LEDs.
-- For these LED pulse signals are still in +ve logic.
......
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