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Conv TTL RS485 - Gateware
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Conv TTL RS485 - Gateware
Commits
54d21202
Commit
54d21202
authored
Jul 04, 2018
by
unknown
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conv_ttl_rs485.xise
syn/Golden/conv_ttl_rs485.xise
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conv_ttl_rs485.xise
syn/Release/conv_ttl_rs485.xise
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syn/Golden/conv_ttl_rs485.xise
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syn/Release/conv_ttl_rs485.xise
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@@ -362,7 +362,7 @@
<!-- -->
<!-- The following properties are for internal use only. These should not be modified.-->
<!-- -->
<property
xil_pn:name=
"PROP_BehavioralSimTop"
xil_pn:value=
"Architecture|testbench|
behav
"
xil_pn:valueState=
"non-default"
/>
<property
xil_pn:name=
"PROP_BehavioralSimTop"
xil_pn:value=
"Architecture|testbench|
arch
"
xil_pn:valueState=
"non-default"
/>
<property
xil_pn:name=
"PROP_DesignName"
xil_pn:value=
"conv_ttl_rs485"
xil_pn:valueState=
"non-default"
/>
<property
xil_pn:name=
"PROP_DevFamilyPMName"
xil_pn:value=
"spartan6"
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"PROP_FPGAConfiguration"
xil_pn:value=
"FPGAConfiguration"
xil_pn:valueState=
"default"
/>
...
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