Commit 1351d6b2 authored by Evangelia Gousiou's avatar Evangelia Gousiou

added test for timetag reg and test for INV channels

parent 9c4bd1d7
This diff is collapsed.
......@@ -50,6 +50,8 @@ package testbench_pkg is
constant C_RTM : std_logic_vector(5 downto 0) := "010101";
constant C_INITIAL_TST_VALUE : std_logic_vector(31 downto 0) := x"FFFFFFF0";
constant C_I2C_MASTER_SLV_ADDR: std_logic_vector(6 downto 0) := "1011110";
-- DUT register map:
constant C_BIDR : std_logic_vector(31 downto 0) := x"00000000";
......@@ -72,6 +74,10 @@ package testbench_pkg is
constant C_CH5RPPCR : std_logic_vector(31 downto 0) := x"00000038";
constant C_CH6RPPCR : std_logic_vector(31 downto 0) := x"0000003C";
constant CH1LTSCYR : std_logic_vector(31 downto 0) := x"0000005C";
constant CH1LTSTLR : std_logic_vector(31 downto 0) := x"00000060";
type t_reg is
record
reg_addr : std_logic_vector(31 downto 0);
......@@ -279,6 +285,9 @@ end component conv_ttl_rs485;
constant exp_val : in std_logic_vector(31 downto 0);
err : out natural);
procedure read_i2c_err (signal i2c_m_in : out t_i2c_master_in;
signal i2c_m_out : in t_i2c_master_out);
end testbench_pkg;
package body testbench_pkg is
--==================================================================================================
......@@ -388,7 +397,7 @@ package body testbench_pkg is
print_now("read_i2c: start");
i2c_m_in.i2c_master_start <= '0';
i2c_m_in.i2c_master_rdwr <= '0'; --mst_fsm_op
i2c_m_in.i2c_master_slv_addr <= "1011110";
i2c_m_in.i2c_master_slv_addr <= C_I2C_MASTER_SLV_ADDR;
i2c_m_in.i2c_master_reg_addr <= (others => '0');
i2c_m_in.i2c_master_send_val <= (others => '1');
wait for 1us;
......@@ -429,7 +438,7 @@ package body testbench_pkg is
print_now("write_i2c: start");
i2c_m_in.i2c_master_start <= '0';
i2c_m_in.i2c_master_rdwr <= '0'; --mst_fsm_op
i2c_m_in.i2c_master_slv_addr <= "1011110";
i2c_m_in.i2c_master_slv_addr <= C_I2C_MASTER_SLV_ADDR;
i2c_m_in.i2c_master_reg_addr <= (others => '0');
i2c_m_in.i2c_master_send_val <= (others => '1');
wait for 1us;
......@@ -448,6 +457,30 @@ package body testbench_pkg is
end procedure write_i2c;
----------------------------------------------------------------------------------------------------
procedure read_i2c_err (signal i2c_m_in : out t_i2c_master_in;
signal i2c_m_out : in t_i2c_master_out) is
variable err_cnt : natural := 0;
begin
print_now("---------------");
print_now("read_i2c_err: start");
i2c_m_in.i2c_master_start <= '0';
i2c_m_in.i2c_master_rdwr <= '0'; --mst_fsm_op
i2c_m_in.i2c_master_slv_addr <= "1011111";
i2c_m_in.i2c_master_reg_addr <= (others => '0');
i2c_m_in.i2c_master_send_val <= (others => '1');
wait for 1us;
i2c_m_in.i2c_master_slv_addr <= "1011111";
i2c_m_in.i2c_master_reg_addr <= x"F1F1F1F1";
i2c_m_in.i2c_master_start <= '1';
i2c_m_in.i2c_master_rdwr <= '1'; --read
wait for C_CLK_20_PER;
i2c_m_in.i2c_master_start <= '0';
wait until i2c_m_out.i2c_master_ready = '1';
print_now("---------------");
end procedure read_i2c_err;
end;
......
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