Rear Transition Module detection
It is important to detect which rear boards are connected. Six pins are
committed to this feature: three pins for the rear transition module
motherboard (RTMM) and three pins for the rear-transition module
piggyback (RTMP) board.
The RTM pins are given as 6 bits in the Status Register SR, these bits
correspond to : RTMP2-RTMP1-RTMP0-RTMM2-RTMM1-RTMM0 in this order,
corresponding to SR.RTM[5:0].
Currently the CONV-TTL-XXX systems have 3 different active RTMs. Each will be recognised in the RTM line register through its unique code. The ID codes for each of the four RTMs are:
| SR.RTM [5] | SR.RTM [4] | SR.RTM [3] | SR.RTM [2] | SR.RTM [1] | SR.RTM [0] | Comment | |
|---|---|---|---|---|---|---|---|
| CONV-TTL-BLO-RTM | 0 | 0 | 0 | 0 | 0 | 1 | Board no longer supported, a few prototypes exist |
| CONV-TTL-BLO-RTM V2 | 0 | 1 | 0 | 0 | 0 | 1 | Compatible with CONV-TTL-BLO motherboard |
| CONV-TTL-RS485-RTM (LEMO 2-pin) | 0 | 0 | 1 | 0 | 0 | 1 | Board no longer supported, a few prototypes exist |
| CONV-TTL-RS485-RTM-DB9 | 1 | 0 | 1 | 0 | 0 | 1 | Compatible with CONV-TTL-RS485 motherboard |
| CONV-RS485-OPT-RTM | 0 | 0 | 0 | 1 | 0 | 1 | Compatible with CONV-TTL-RS485 motherboard |
RTM ID hardware implementation
The board detection works in the same way as VME64x Geographical Address
pins, in which every pin is open by default and grounded while
asserted. The open pin is connected to VCC via pull-up resistors on the
front module board, and then through inverting Schmitt triggers to the
FPGA inputs. Thus, when the FPGA detects a high level it indicates
that a certain pin was asserted, and that an RTMM/P is present.
For an explanation about the selection of Blocking RTMP identification
lines, see issue
#702.
Board Classification Pins
The tables below show the connection of the detection lines on the RTMM and RTMP boards.
Rear Transition Module Motherboard (RTMM) and Rear Transition Module Panel (RTMP)
| RTMM2 | RTMM1 | RTMM0 | RTMP2 | RTMP1 | RTMP0 | |
|---|---|---|---|---|---|---|
| Not connected | Open | Open | Open | X | X | X |
| CONV-TTL-BLO-RTM | Open | Open | GND | Open | Open | Open |
| CONV-TTL-BLO-RTM V2 | Open | Open | GND | Open | GND | Open |
| CONV-TTL-RS485-RTM-DB9 | Open | Open | GND | GND | Open | GND |
| CONV-TTL-RS485-RTM (LEMO 2-pin) | Open | Open | GND | Open | Open | GND |
| Reserved | Open | GND | Open | X | X | X |
| Reserved | Open | GND | GND | X | X | X |
| Reserved | GND | Open | Open | X | X | X |
| CONV-RS485-OPT-RTM | GND | Open | GND | Open | Open | Open |
| Reserved | GND | GND | Open | X | X | X |
| Reserved | GND | GND | GND | X | X | X |
(X) Don't care
strikethrough Means the board is no longer supported
Note 1*: Due to reasons specified above, in the context of the FPGA
firmware, an Open should be read as GND, and a GND as
VCC*.
Note 2*: Boards CONV-TTL-BLO-RTM, CONV-TTL-BLO-RTM V2,
CONV-TTL-RS485-RTM-DB9, CONV-TTL-RS485-RTM (LEMO 2-pin) all share
the same RTM motherboard, hence the identical RTMP0..RTMP2 code.
Note 3*: The optical RTM has no panel, therefore only RTMM lines are
meaningful, RTMP lines will read Open
Theodor-Adrian Stana, Carlos-Gil Soriano, Denia Bouhired, 16 March 2018