Skip to content

  • Projects
  • Groups
  • Snippets
  • Help
    • Loading...
  • Sign in
C
Conv TTL Blocking - Testing
  • Project
    • Project
    • Details
    • Activity
    • Cycle Analytics
  • Repository
    • Repository
    • Files
    • Commits
    • Branches
    • Tags
    • Contributors
    • Graph
    • Compare
    • Charts
  • Issues 0
    • Issues 0
    • List
    • Board
    • Labels
    • Milestones
  • Merge Requests 0
    • Merge Requests 0
  • Wiki
    • Wiki
  • image/svg+xml
    Discourse
    • Discourse
  • Members
    • Members
  • Collapse sidebar
  • Activity
  • Graph
  • Charts
  • Create a new issue
  • Commits
  • Issue Boards
  • Projects
  • Conv TTL Blocking - Testing
  • Issues
  • #1

Closed
Open
Opened Mar 31, 2017 by Denia Bouhired-Ferrag@dbouhired
  • Report abuse
  • New issue
Report abuse New issue

PTS: Add support for PCB version check

V4 boards, enable the FPGA to find out the version of the PCB hardware.
The PTS should be able to check the information and display it.
Feature to be added in new gateware release.

Assignee
Assign to
None
Milestone
None
Assign milestone
Time tracking
None
Due date
No due date
1
Labels
feature
Assign labels
  • View project labels
Reference: project/conv-ttl-blo-tst#1