[gw-v2.0] Integrate the max. pulse duty cycle over time
Issue #922 describes the selected maximum pulse duty cycle. Following a meeting, it was established that it might be possible to "integrate" the maximum pulse duty cycle over a longer period of time, to accommodate for applications where pulses arrive in bursts, followed by a "quiet" period, when no pulses arrive for a long period of time.
The blocking output stage should in principle still work for such applications, as long as the temperature of the output transistors does not go above a limit threshold. If we allow for a maximum number of pulses to arrive, then reject more pulses for a sufficient amount of time so that the transistor cools back down, a limited number of burst pulses may be accepted.
This feature will be implemented as part of gateware v3.0 and has to be tested to find proper limiting thresholds on the number of burst pulses accepted.