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Conv TTL Blocking - Gateware
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Opened Mar 07, 2017 by Denia Bouhired-Ferrag@dbouhired
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Diagnostics: Increase depth of timestamp FIFO

Currently, timestamps for incoming pulses are stored in a 128 deep ring buffer.
For release 4 of the gateware, capable of supporting pulse repetition of up to 2MHz, the fifo will fill up after 64us in the worst case.
Given the speed of the I2C bus, there is no possible way to access any meaningful timestamp data in this setup.

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Reference: project/conv-ttl-blo-gw#1