- 29 Oct, 2013 4 commits
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Theodor-Adrian Stana authored
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Theodor-Adrian Stana authored
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Theodor-Adrian Stana authored
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Theodor-Adrian Stana authored
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- 28 Oct, 2013 3 commits
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Theodor-Adrian Stana authored
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Theodor-Adrian Stana authored
Signed-off-by: Theodor Stana <t.stana@cern.ch>
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Theodor-Adrian Stana authored
- added access commands subsection to VBCP protocol section - added synthesis results section - changed state machine naming (removed "ST_") Signed-off-by: Theodor Stana <t.stana@cern.ch>
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- 22 Oct, 2013 4 commits
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Theodor-Adrian Stana authored
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Theodor-Adrian Stana authored
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Theodor-Adrian Stana authored
- corrected i2c_done_o high whenever a successful transfer occurs in i2c_slave - changed interface (i2c_err_o is now err_o) (i2c_done_o is now tip_o)
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Theodor-Adrian Stana authored
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- 15 Oct, 2013 2 commits
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Theodor-Adrian Stana authored
Signed-off-by: Theodor Stana <t.stana@cern.ch>
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Theodor-Adrian Stana authored
Signed-off-by: Theodor Stana <t.stana@cern.ch>
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- 14 Oct, 2013 1 commit
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Theodor-Adrian Stana authored
This was done by packing three flash data bytes into one register and combining this with the newly-implemented writemregs command which gives us the possibility to write 8 regs at once, thus 24 flash bytes at once. Signed-off-by: Theodor Stana <t.stana@cern.ch>
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- 24 Sep, 2013 1 commit
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Theodor-Adrian Stana authored
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- 20 Sep, 2013 2 commits
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Theodor-Adrian Stana authored
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Theodor-Adrian Stana authored
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- 18 Sep, 2013 1 commit
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Theodor-Adrian Stana authored
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- 06 Sep, 2013 1 commit
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Theodor-Adrian Stana authored
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- 04 Sep, 2013 1 commit
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Theodor-Adrian Stana authored
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- 03 Sep, 2013 1 commit
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Theodor-Adrian Stana authored
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- 02 Sep, 2013 1 commit
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Theodor-Adrian Stana authored
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- 23 Aug, 2013 1 commit
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Theodor-Adrian Stana authored
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- 21 Aug, 2013 1 commit
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Theodor-Adrian Stana authored
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- 20 Aug, 2013 2 commits
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Theodor-Adrian Stana authored
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Theodor-Adrian Stana authored
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- 19 Aug, 2013 3 commits
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Theodor-Adrian Stana authored
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Theodor-Adrian Stana authored
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Theodor-Adrian Stana authored
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- 16 Aug, 2013 4 commits
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Theodor-Adrian Stana authored
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Theodor-Adrian Stana authored
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Theodor-Adrian Stana authored
- freq, pulse, delay controllable via ports
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Theodor-Adrian Stana authored
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- 14 Aug, 2013 1 commit
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Theodor-Adrian Stana authored
made the necessary changes in - source files - vbcp_wb doc - hdlguide
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- 13 Aug, 2013 1 commit
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Theodor-Adrian Stana authored
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- 08 Aug, 2013 2 commits
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Theodor-Adrian Stana authored
- pulse rejection to 1/5 duty cycle - status reg contains fwvers, switches and rtm field - i2c_slave has internal watchdog timer
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Theodor-Adrian Stana authored
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- 07 Aug, 2013 3 commits
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Theodor-Adrian Stana authored
- hdl compiles fine, still needs actual testing - changed hdlguide to reflect new folder structure due to submodule
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Theodor-Adrian Stana authored
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Theodor-Adrian Stana authored
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