- 17 Feb, 2017 6 commits
-
-
Projects authored
-
Maciej Sumiński authored
-
Maciej Sumiński authored
-
Maciej Sumiński authored
-
Projects authored
-
Projects authored
-
- 16 Feb, 2017 1 commit
-
-
Projects authored
-
- 27 Jan, 2015 2 commits
-
-
Theodor-Adrian Stana authored
-
Theodor-Adrian Stana authored
-
- 26 Jan, 2015 1 commit
-
-
Theodor-Adrian Stana authored
-
- 23 Jan, 2015 1 commit
-
-
Theodor-Adrian Stana authored
-
- 10 Dec, 2014 1 commit
-
-
Theodor-Adrian Stana authored
-
- 30 Sep, 2014 1 commit
-
-
Theodor-Adrian Stana authored
-
- 29 Sep, 2014 2 commits
-
-
Theodor-Adrian Stana authored
-
Theodor-Adrian Stana authored
-
- 26 Sep, 2014 3 commits
-
-
Theodor-Adrian Stana authored
The following sections were updated: - 3.1 TTL input logic -- added reflection of no signal detect state in LSR - 3.2 First pulse inhibit -- added delay before enabling the line to conv-common-gw - 3.3 Line input logic -- added reflection of no signal detect state in LSR - 3.4 Switches -- made figure more compact
-
Theodor-Adrian Stana authored
Also updated ISE project file to test that nothing went wrong when these modules were deleted.
-
Theodor-Adrian Stana authored
The issue with the first pulse inhibit mechanism was (again) that it needs to be disabled one clock cycle after the TTL-BAR no signal detect block is disabled, otherwise the no signal detect block has no effect on the conv-common-gw block, due to sub-modules still being in a reset state. A one-clock-cycle delayed version of inhibit_first_pulse is now used to enable passing the pulse signals to the conv-common-gw block. In addition to this modification, the FRONTFS and FRONTINVFS bits were added to the LSR inside conv-common-gw. The necessary additions were made here to account for the changes in the conv-common-gw interface.
-
- 25 Sep, 2014 4 commits
-
-
Theodor-Adrian Stana authored
Also prepared the ISE project file for v3.0 release
-
Theodor-Adrian Stana authored
-
Theodor-Adrian Stana authored
-
Theodor-Adrian Stana authored
-
- 28 Aug, 2014 1 commit
-
-
Theodor-Adrian Stana authored
-
- 25 Aug, 2014 1 commit
-
-
Theodor-Adrian Stana authored
-
- 22 Aug, 2014 3 commits
-
-
Theodor-Adrian Stana authored
This is done by lighting the LED red when the upper four bits of the gateeware version are "0000".
-
Theodor-Adrian Stana authored
-
Theodor-Adrian Stana authored
-
- 21 Aug, 2014 3 commits
-
-
Theodor-Adrian Stana authored
This means we're close to g/w v2.3 (only lacking the documentation)
-
Theodor-Adrian Stana authored
general-cores is a submodule of conv-common-gw, and it is from there that all general-cores modules used on top-level are imported
-
Theodor-Adrian Stana authored
-
- 03 May, 2014 1 commit
-
-
Theodor-Adrian Stana authored
Signed-off-by: Theodor Stana <t.stana@cern.ch>
-
- 02 May, 2014 1 commit
-
-
Theodor-Adrian Stana authored
Signed-off-by: Theodor Stana <t.stana@cern.ch>
-
- 25 Apr, 2014 1 commit
-
-
Theodor-Adrian Stana authored
Signed-off-by: Theodor Stana <t.stana@cern.ch>
-
- 15 Apr, 2014 1 commit
-
-
Theodor-Adrian Stana authored
-
- 08 Apr, 2014 2 commits
-
-
Theodor-Adrian Stana authored
-
Theodor-Adrian Stana authored
Signed-off-by: Theodor Stana <t.stana@cern.ch>
-
- 07 Apr, 2014 2 commits
-
-
Theodor-Adrian Stana authored
-
Theodor-Adrian Stana authored
gencores-suproj: fix bug in wb_i2c_slave ctblo_pulse_gen.vhd: add pulse_err_o to signal when a pulse is rejected conv_regs.vhd: add PMISSE and I2C_ERR bits top-level: implement PMISSE and I2C_ERR bits and change error LED logic Signed-off-by: Theodor Stana <t.stana@cern.ch>
-
- 28 Mar, 2014 2 commits
-
-
Theodor-Adrian Stana authored
Signed-off-by: Theodor Stana <t.stana@cern.ch>
-
Theodor-Adrian Stana authored
Signed-off-by: Theodor Stana <t.stana@cern.ch>
-