Conv TTL Blocking - Gateware:e7e08870a05a77d16c7d2891a6b890d266109a99 commitshttps://ohwr.org/project/conv-ttl-blo-gw/commits/e7e08870a05a77d16c7d2891a6b890d266109a992013-10-29T09:14:00Zhttps://ohwr.org/project/conv-ttl-blo-gw/commit/e7e08870a05a77d16c7d2891a6b890d266109a99premerge2013-10-29T09:14:00ZTheodor Stanat.stana@cern.chhttps://ohwr.org/project/conv-ttl-blo-gw/commit/a4b33dbab230fed631d76b2bb93de96b5ce5921cchanged link coloring in pdfs2013-10-29T09:12:25ZTheodor Stanat.stana@cern.chhttps://ohwr.org/project/conv-ttl-blo-gw/commit/f6ae6361f7e16f6c9799b4f08f0f5ea110612b68changed link coloring in pdfs2013-10-29T08:49:57ZTheodor Stanat.stana@cern.chhttps://ohwr.org/project/conv-ttl-blo-gw/commit/5f69b1004180f2d07d0ba95f2d8276749ddcdcfcupdated hdlguide to v2 firmware2013-10-28T17:09:24ZTheodor Stanat.stana@cern.chhttps://ohwr.org/project/conv-ttl-blo-gw/commit/24c4474d4aa3e35d1fad67edcd4151cf607e08dcAdded multiboot module documentation2013-10-28T16:18:52ZTheodor Stanat.stana@cern.chSigned-off-by: <span data-trailer="Signed-off-by:" data-user="9131"><a href="https://ohwr.org/tstana" title="t.stana@cern.ch"><img alt="Theodor-Adrian Stana's avatar" src="https://secure.gravatar.com/avatar/a3767bb59eeb8a2b1e271ce4c2d6410b?s=32&d=identicon" class="avatar s16 avatar-inline" title="Theodor-Adrian Stana"></a><a href="https://ohwr.org/tstana" title="t.stana@cern.ch">Theodor Stana</a> <<a href="mailto:t.stana@cern.ch" title="t.stana@cern.ch">t.stana@cern.ch</a>></span>https://ohwr.org/project/conv-ttl-blo-gw/commit/00356b8c7df93e74ea108688f1856ccb90d9cb13vbcp_wb doc additions and small changes2013-10-28T16:17:14ZTheodor Stanat.stana@cern.ch
- added access commands subsection to VBCP protocol section
- added synthesis results section
- changed state machine naming (removed "ST_")
Signed-off-by: <span data-trailer="Signed-off-by:" data-user="9131"><a href="https://ohwr.org/tstana" title="t.stana@cern.ch"><img alt="Theodor-Adrian Stana's avatar" src="https://secure.gravatar.com/avatar/a3767bb59eeb8a2b1e271ce4c2d6410b?s=32&d=identicon" class="avatar s16 avatar-inline" title="Theodor-Adrian Stana"></a><a href="https://ohwr.org/tstana" title="t.stana@cern.ch">Theodor Stana</a> <<a href="mailto:t.stana@cern.ch" title="t.stana@cern.ch">t.stana@cern.ch</a>></span>https://ohwr.org/project/conv-ttl-blo-gw/commit/722ce2ed88a8017e1921f1e3185a4436f7976cc7updated vbcp_wb documentation2013-10-22T16:06:55ZTheodor Stanat.stana@cern.chhttps://ohwr.org/project/conv-ttl-blo-gw/commit/1253636abfa9c3f2bb0a80e722c69103bc942a6dadded xil_multiboot to test_pulse project2013-10-22T15:03:41ZTheodor Stanat.stana@cern.chhttps://ohwr.org/project/conv-ttl-blo-gw/commit/148ce7b67ae54474562dbd4ec36fa917e33a2aa5vbcp_wb corrections2013-10-22T14:12:27ZTheodor Stanat.stana@cern.ch
- corrected i2c_done_o high whenever a successful transfer occurs
in i2c_slave
- changed interface
(i2c_err_o is now err_o)
(i2c_done_o is now tip_o)https://ohwr.org/project/conv-ttl-blo-gw/commit/1fa8d796623a4a2aeaa57d54e9f2117640b97aacmultiboot works2013-10-22T10:20:09ZTheodor Stanat.stana@cern.chhttps://ohwr.org/project/conv-ttl-blo-gw/commit/5b6e568a54976df6d864eca3ce525d93e3840ae2Working on integrating multiboot module2013-10-15T17:28:03ZTheodor Stanat.stana@cern.chSigned-off-by: <span data-trailer="Signed-off-by:" data-user="9131"><a href="https://ohwr.org/tstana" title="t.stana@cern.ch"><img alt="Theodor-Adrian Stana's avatar" src="https://secure.gravatar.com/avatar/a3767bb59eeb8a2b1e271ce4c2d6410b?s=32&d=identicon" class="avatar s16 avatar-inline" title="Theodor-Adrian Stana"></a><a href="https://ohwr.org/tstana" title="t.stana@cern.ch">Theodor Stana</a> <<a href="mailto:t.stana@cern.ch" title="t.stana@cern.ch">t.stana@cern.ch</a>></span>https://ohwr.org/project/conv-ttl-blo-gw/commit/92c9d25a5130b19e8682ddb354ade0e1b25dbaa4Commented code, prior to merge with master branch2013-10-15T09:05:47ZTheodor Stanat.stana@cern.chSigned-off-by: <span data-trailer="Signed-off-by:" data-user="9131"><a href="https://ohwr.org/tstana" title="t.stana@cern.ch"><img alt="Theodor-Adrian Stana's avatar" src="https://secure.gravatar.com/avatar/a3767bb59eeb8a2b1e271ce4c2d6410b?s=32&d=identicon" class="avatar s16 avatar-inline" title="Theodor-Adrian Stana"></a><a href="https://ohwr.org/tstana" title="t.stana@cern.ch">Theodor Stana</a> <<a href="mailto:t.stana@cern.ch" title="t.stana@cern.ch">t.stana@cern.ch</a>></span>https://ohwr.org/project/conv-ttl-blo-gw/commit/bfa6c70eec6fe363e70c99ffab3266e0a6bd92a5Improved page write time to roughly 12 mins2013-10-14T15:46:00ZTheodor Stanat.stana@cern.ch
This was done by packing three flash data bytes into one register
and combining this with the newly-implemented writemregs command
which gives us the possibility to write 8 regs at once, thus
24 flash bytes at once.
Signed-off-by: <span data-trailer="Signed-off-by:" data-user="9131"><a href="https://ohwr.org/tstana" title="t.stana@cern.ch"><img alt="Theodor-Adrian Stana's avatar" src="https://secure.gravatar.com/avatar/a3767bb59eeb8a2b1e271ce4c2d6410b?s=32&d=identicon" class="avatar s16 avatar-inline" title="Theodor-Adrian Stana"></a><a href="https://ohwr.org/tstana" title="t.stana@cern.ch">Theodor Stana</a> <<a href="mailto:t.stana@cern.ch" title="t.stana@cern.ch">t.stana@cern.ch</a>></span>https://ohwr.org/project/conv-ttl-blo-gw/commit/a8a7895b66140533af2e580c9898c4f58dab747fudpated multiboot bitfile with new vbcp2013-09-24T13:36:42ZTheodor Stanat.stana@cern.chhttps://ohwr.org/project/conv-ttl-blo-gw/commit/3c5f741a866087421609c6900e5489df4925fe4bplayed around with header generation2013-09-20T15:19:45ZTheodor Stanat.stana@cern.chhttps://ohwr.org/project/conv-ttl-blo-gw/commit/e7a819423f6390117cec71f17bc80ae21d221e6amade vbcp accept more than one word2013-09-20T12:34:48ZTheodor Stanat.stana@cern.chhttps://ohwr.org/project/conv-ttl-blo-gw/commit/f362dfd4d4efc14b239a8ed1df2bf1c7febb740bimproved behavior of pulse test fw2013-09-18T10:16:21ZTheodor Stanat.stana@cern.chhttps://ohwr.org/project/conv-ttl-blo-gw/commit/8762bfef96445ce7ea02d7a768fdb4a7ace63890software trigger of iprog command working2013-09-06T20:36:55ZTheodor Stanat.stana@cern.chhttps://ohwr.org/project/conv-ttl-blo-gw/commit/b58a52a466d4f37e4b8afb6f4bd9150efa8e40adaccess to flash via software works2013-09-04T15:46:59ZTheodor Stanat.stana@cern.chhttps://ohwr.org/project/conv-ttl-blo-gw/commit/bac8cfc22e2eac66bf16cd663afbaa5ad0183279new approach, software writes to flash directly2013-09-03T17:07:11ZTheodor Stanat.stana@cern.chhttps://ohwr.org/project/conv-ttl-blo-gw/commit/653b87968a8f8c8d273c213e23a19319df9c7bafwrite to flash works, made m25p fsm more modular2013-09-02T15:58:05ZTheodor Stanat.stana@cern.chhttps://ohwr.org/project/conv-ttl-blo-gw/commit/78ca5d508b4572c215afe30bdc33374c8c45eaaeworking on write to flash chip, reading works2013-08-23T15:22:16ZTheodor Stanat.stana@cern.chhttps://ohwr.org/project/conv-ttl-blo-gw/commit/c5f495923c24d0265354cd9c28fcd9c65860afe5reboot and read bootsts working2013-08-21T12:59:14ZTheodor Stanat.stana@cern.chhttps://ohwr.org/project/conv-ttl-blo-gw/commit/effeaabc99b87addbf0fea004bb0d351ce55dafdwork on multiboot2013-08-20T17:39:38ZTheodor Stanat.stana@cern.chhttps://ohwr.org/project/conv-ttl-blo-gw/commit/201bc48293d463d6e971a1d05187dd580542190eiprog cmd works in synthesized multiboot design2013-08-20T10:40:51ZTheodor Stanat.stana@cern.chhttps://ohwr.org/project/conv-ttl-blo-gw/commit/ce720fdd9313bb9f970af1835b430e05791a7128work on multiboot component2013-08-19T16:24:57ZTheodor Stanat.stana@cern.chhttps://ohwr.org/project/conv-ttl-blo-gw/commit/efeed6c868ed30e9897ba07423e7f8d7cee93e93changed multiboot to multiboot-old2013-08-19T08:31:49ZTheodor Stanat.stana@cern.chhttps://ohwr.org/project/conv-ttl-blo-gw/commit/30a7e29a098ef308e5a533d281917f82a6189576test_pulse_regs is now only test_pulse2013-08-19T07:39:06ZTheodor Stanat.stana@cern.chhttps://ohwr.org/project/conv-ttl-blo-gw/commit/1a49e95ce4736b0d8f7d0fde8050ba34e9c92114changed sizes of multiboot figures2013-08-16T11:22:22ZTheodor Stanat.stana@cern.chhttps://ohwr.org/project/conv-ttl-blo-gw/commit/f44e80000fc3ae777650312a65a855cc07c56da0added test_pulse_regs fw2013-08-16T11:03:35ZTheodor Stanat.stana@cern.chhttps://ohwr.org/project/conv-ttl-blo-gw/commit/10c69bc171d2fd147dd832ba176f8d33645a7866pulse_gen_gp now v2.02013-08-16T11:02:45ZTheodor Stanat.stana@cern.ch
- freq, pulse, delay controllable via portshttps://ohwr.org/project/conv-ttl-blo-gw/commit/3d77c4bf13de05533dac614083aabda3fceee520renamed regtest to test_regs2013-08-16T07:39:35ZTheodor Stanat.stana@cern.chhttps://ohwr.org/project/conv-ttl-blo-gw/commit/b7f404e06a67b050ab9f7289237850c001a9141belma_i2c is now named vbcp_wb2013-08-14T10:09:49ZTheodor Stanat.stana@cern.ch
made the necessary changes in
- source files
- vbcp_wb doc
- hdlguidehttps://ohwr.org/project/conv-ttl-blo-gw/commit/8fe29359948c5153580ce9478084115cea65ba22added multiboot doc figures2013-08-13T07:04:12ZTheodor Stanat.stana@cern.chhttps://ohwr.org/project/conv-ttl-blo-gw/commit/c5de452b530a1467cb21541b3d61a8cc8e6b1a2bfirmware v1.022013-08-08T08:54:20ZTheodor Stanat.stana@cern.ch
- pulse rejection to 1/5 duty cycle
- status reg contains fwvers, switches and rtm field
- i2c_slave has internal watchdog timerhttps://ohwr.org/project/conv-ttl-blo-gw/commit/efb814d34c3714d5bdd2d0265e06b5a05480b16ddummy commit2013-08-08T08:21:50ZTheodor Stanat.stana@cern.chhttps://ohwr.org/project/conv-ttl-blo-gw/commit/770bd30e2d5d1b754fce8eeabe474b53b9d7a819compiled hdl and changed hdlguide2013-08-07T17:39:08ZTheodor Stanat.stana@cern.ch
- hdl compiles fine, still needs actual testing
- changed hdlguide to reflect new folder structure due to submodulehttps://ohwr.org/project/conv-ttl-blo-gw/commit/11fc52748f96a0922cbc4855b209163cbf0842f3moved hdl doc files to doc/2013-08-07T17:09:04ZTheodor Stanat.stana@cern.chhttps://ohwr.org/project/conv-ttl-blo-gw/commit/c412bca1586e02c3e95bc28a26574faa35ec0822deleted unnecessary folders and docs2013-08-07T16:52:44ZTheodor Stanat.stana@cern.chhttps://ohwr.org/project/conv-ttl-blo-gw/commit/5aac9b0639b4cb0ed6c686c47d11de99fe4bc170added rtm interface tester files2013-08-07T16:34:16ZTheodor Stanat.stana@cern.ch