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C
Conv TTL Blocking - Gateware
Commit c412bca1 authored by Theodor-Adrian Stana's avatar Theodor-Adrian Stana
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ug/userGuide.pdf
old-ug-conv-ttl-blo.pdf
userGuide.pdf
pts/
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FILE=hwguide-conv-ttl-blo
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\begin{titlepage}
\vspace*{3cm}
%---------------------------------------------------------------
% name
%---------------------------------------------------------------
\noindent{\LARGE \textbf{CONV-TTL-BLO Hardware Guide}}
\noindent \rule{\textwidth}{.1cm}
\hfill\today
\vspace*{3cm}
\begin{figure}[h]
\includegraphics[height=3cm]{fig/cern-logo}
\hfill
\includegraphics[height=3cm]{fig/ohwr-logo}
\end{figure}
\vfill
%---------------------------------------------------------------
% name
%---------------------------------------------------------------
\noindent {\Large \textbf{Theodor-Adrian Stana (CERN/BE-CO-HT)}}
\noindent \rule{\textwidth}{.05cm}
\end{titlepage}
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@misc{ctb-ug,
author = "Theodor-Adrian Stana",
title = {{CONV-TTL-BLO User Guide}},
day = 25,
month = 06,
year = 2013,
howpublished = {\url{http://www.ohwr.org/documents/263}}
}
@misc{ctb-hdlguide,
author = "Theodor-Adrian Stana",
title = {{CONV-TTL-BLO HDL Guide}},
month = 07,
year = 2013,
howpublished = {\url{http://www.ohwr.org/documents/290}}
}
@misc{sysmon-i2c,
author = "{ELMA}",
title = {{Access to board data using SNMP and I2C}},
howpublished = {\url{http://www.ohwr.org/attachments/download/2324/ELMA_SNMP_specification.pdf}}
}
@misc{white-rabbit,
title = {{White Rabbit}},
howpublished = {\url{http://www.ohwr.org/projects/white-rabbit}}
}
@misc{conv-ttl-blo-sch,
title = {{CONV-TTL-BLO Schematics}},
howpublished = {\url{https://edms.cern.ch/file/1278535/1/EDA-02446-V2-1_sch.pdf}}
}
@misc{rtmm-sch,
title = {{RTM Motherboard Schematics}},
howpublished = {\url{https://edms.cern.ch/file/1281435/1/EDA-02452-V2-0_sch.pdf}}
}
@misc{rtmp-sch,
title = {{RTM Piggyback Schematics}},
howpublished = {\url{https://edms.cern.ch/file/1178456/1/EDA-02453-V1-0_sch.pdf}}
}
@misc{blo-ps-datasheet,
author = {{Texas Instruments}},
title = {{TPS40210, TPS40211, 4.5~V to 52~V Input Current Mode Boost Controller}},
howpublished = {\url{http://www.ohwr.org/documents/227}}
}
@misc{spec,
title = {{Simple PCIE FMC Carrier (SPEC)}},
howpublished = {\url{http://www.ohwr.org/projects/spec}}
}
@misc{svec,
title = {{Simple VME FMC Carrier (SVEC)}},
howpublished = {\url{http://www.ohwr.org/projects/svec}}
}
@misc{rtmdet,
title = {{Rear Transition Module Detection}},
howpublished = {\url{http://www.ohwr.org/projects/conv-ttl-blo/wiki/RTM_board_detection}}
}
@misc{blo-std,
author = "C. Gil Soriano",
title = {{Standard Blocking Output Signal Definition for CTDAH board}},
month = sep,
year = 2011,
note = {\url{http://www.ohwr.org/documents/109}}
}
@misc{opto-ds,
author = {{Avago Technologies}},
title = {{High CMR, High Speed TTL Compatible Optocouplers}},
note = {\url{http://www.avagotech.com/docs/AV02-0940EN}}
}
@misc{nxp-an11158,
author = {{NXP Semiconductor}},
title = {{Understanding power MOSFET datasheet parameters}},
day = 7,
month = January,
year = 2013,
note = {\url{http://www.nxp.com/documents/application_note/AN11158.pdf}}
}
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HCCTDAH___-CR000001 Ettiene Caillet
HCCTDAH___-CR000002 864-A09
HCCTARA___-CR000001 Ettiene Caillet
HCCTARA___-CR000002 864-A09
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FILE=test-log
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\documentclass[a4paper,11pt]{article}
\usepackage[pdfborder= 0 0 0 1]{hyperref}
\usepackage{graphicx}
\usepackage{hyperref}
\usepackage{rotating}
\usepackage{multirow}
\usepackage{color}
\begin{document}
\title{
\textbf{
CONV-TTL-BLO \\
Test Log \\
}
}
\author{Theodor-Adrian Stana\\
% \href{mailto:t.stana@cern.ch}{\textbf{\textit{t.stana@cern.ch}}}\\
BE-CO-HT\\
}
\date{\today}
\maketitle
\thispagestyle{empty}
\begin{figure}[htb]
\begin{center}
\includegraphics[scale=0.25, keepaspectratio]{fig/cern-logo.png}
\end{center}
\end{figure}
\pagebreak
\pagenumbering{roman}
\setcounter{page}{1}
%\tableofcontents
\pagebreak
\listoffigures
\listoftables
\pagebreak
\pagenumbering{arabic}
\setcounter{page}{1}
\thispagestyle{empty}
%==============================================================================
% SEC: Chain test 1
%==============================================================================
\section{Daisy-chain test 1}
\label{sec:chain-test-1}
The setup for this test is as shown in Fig.~\ref{fig:dct1-setup}. A CTRV board
is used to generate TTL pulses to the CONV-TTL-BLO after which this pulse is
daisy-chained as shown in the figure. Both TTL and blocking pulses are generated
in the daisy-chain; Fig.~\ref{fig:dct1-setup} highlights the channel where a
switch from TTL to blocking or viceversa is made.
\begin{figure}[h]
\centerline{\includegraphics[scale=.8]{fig/dct1-setup}}
\caption{Setup for daisy-chain test 1}
\label{fig:dct1-setup}
\end{figure}
Three counters in the CTRV are used; the first is the one which generates the
pulses to be sent through the daisy-chain. The output of the first counter is
used as the start signal for itself and as the clock for the second-channel counter.
The second channel counter is setup to output a DC-level signal (pulse width twice
greatner than the frequency); this signal is used as the start signal for the
third-channel counter. The settings for all of the channels are shown in
Table~\ref{tbl:ctrv-counters}.
\begin{table}[h]
\caption{CTRV counter settings}
\label{tbl:ctrv-counters}
\centerline
{
\begin{tabular}{c c c c}
\hline
\textbf{Chan} & \textbf{Pulse width} & \textbf{Freq} & \textbf{Max val} \\
\hline
1 & 1~$\mu$s & 100~kHz & 100 \\
2 & 20~$\mu$s (DC) & 100~kHz & 2 \\
3 & -- & -- & 1 \\
\hline
\end{tabular}
}
\end{table}
Each CTRV counter generates a pulse signal on the output when the counter reaches 0;
the start signal causes the value of the counter to be reset and the counter to start
counting down. Thus, the configuration in Table~\ref{tbl:ctrv-counters} yields 1~$\mu$s
pulses generated at a frequency of 100~kHz and passed through the daisy-chain. Since the
channel 2 counter is configured with a max. value of two, a start pulse from the channel 1
counter starts the counting down and an arriving pulse from the CONV-TTL-BLO restarts the
counter. If any pulse is missed by the CONV-TTL-BLO through the daisy-chain, the output
of channel 2 counter goes high and this causes the channel three counter to trigger an
interrupt. The CTRV is monitored for interrupts using the \textit{ctrvtest}
program; any missed pulses (any interrupts) are time-tagged by the program, thus showing
when a pulse was missed.
\end{document}
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\begin{titlepage}
\vspace*{3cm}
\noindent{\LARGE \textbf{CONV-TTL-BLO User Guide}}
\noindent \rule{\textwidth}{.1cm}
\hfill\today
\vspace*{3cm}
\begin{figure}[h]
\includegraphics[height=3cm]{fig/cern-logo}
\hfill
\includegraphics[height=3cm]{fig/ohwr-logo}
\end{figure}
\vfill
\noindent {\Large \textbf{Theodor-Adrian Stana (CERN/BE-CO-HT)}}
\noindent \rule{\textwidth}{.05cm}
\end{titlepage}
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# PROMGEN: Xilinx Prom Generator O.76xd
# Copyright (c) 1995-2011 Xilinx, Inc. All rights reserved.
SOFTWARE_VERSION O.76xd
DATE 11/21/2012 - 12: 5
SOURCE /media/BACKUP/CERN/contrib/ohwr-git/conv-ttl-blo/hdl/basic_trigger/bitstream/basic_trigger_top.mcs
DEVICE 4096K
DATA_WIDTH 1
FILL_DATA 0xFF
SIGNATURE 0x2946E582
START_ADDRESS 0x00000000 END_ADDRESS 0x0016A673 DIRECTION_UP "/media/BACKUP/CERN/contrib/ohwr-git/conv-ttl-blo/hdl/basic_trigger/bitstream/basic_trigger_top.bit" 6slx45tfgg484
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Release 13.3 - Bitgen O.76xd (lin)
Copyright (c) 1995-2011 Xilinx, Inc. All rights reserved.
Loading device for application Rf_Device from file '6slx45t.nph' in environment
/opt/Xilinx/13.3/ISE_DS/ISE/.
"basic_trigger_top" is an NCD, version 3.2, device xc6slx45t, package fgg484,
speed -3
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/media/BACKUP/CERN/contrib/ohwr-git/conv-ttl-blo/hdl/basic_trigger/project/basic_trigger_top.ngc 1353494996
OK
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