Commit c08b5d55 authored by Theodor-Adrian Stana's avatar Theodor-Adrian Stana

regtest firmware: Made changes to accomodate additions to wb_i2c_bridge component

interface
Signed-off-by: Theodor-Adrian Stana's avatarTheodor Stana <t.stana@cern.ch>
parent 78769118
......@@ -58,6 +58,7 @@ FILES := ../../top/regtest/regtest.ucf \
../../ip_cores/general-cores/modules/common/gc_word_packer.vhd \
../../ip_cores/general-cores/modules/common/gc_i2c_slave.vhd \
../../ip_cores/general-cores/modules/common/gc_glitch_filt.vhd \
../../ip_cores/general-cores/modules/common/gc_fsm_watchdog.vhd \
../../ip_cores/general-cores/modules/genrams/genram_pkg.vhd \
../../ip_cores/general-cores/modules/genrams/memory_loader_pkg.vhd \
../../ip_cores/general-cores/modules/genrams/generic_shiftreg_fifo.vhd \
......
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......@@ -62,7 +62,7 @@ NET "mr_n_o" LOC = T22;
NET "mr_n_o" IOSTANDARD = LVCMOS33;
NET "clk20_vcxo_i" LOC = E16;
NET "clk20_vcxo_i" TNM_NET=clk20_vcxo_i;
NET "clk20_vcxo_i" TNM_NET = "clk20_vcxo_i";
TIMESPEC TSCLK20 = PERIOD "clk20_vcxo_i" 20 MHz HIGH 50 %;
##=============================================================================
......@@ -225,30 +225,30 @@ NET "inv_out_o[4]" IOSTANDARD = LVCMOS33;
##-- Blocking I/O
##-----------------------------------------------------------------------------
NET "fpga_blo_in_i[1]" LOC = Y9;
NET "fpga_blo_in_i[1]" IOSTANDARD = "LVCMOS33";
NET "fpga_blo_in_i[1]" IOSTANDARD = LVCMOS33;
NET "fpga_blo_in_i[2]" LOC = AA10;
NET "fpga_blo_in_i[2]" IOSTANDARD = "LVCMOS33";
NET "fpga_blo_in_i[2]" IOSTANDARD = LVCMOS33;
NET "fpga_blo_in_i[3]" LOC = W12;
NET "fpga_blo_in_i[3]" IOSTANDARD = "LVCMOS33";
NET "fpga_blo_in_i[3]" IOSTANDARD = LVCMOS33;
NET "fpga_blo_in_i[4]" LOC = AA6;
NET "fpga_blo_in_i[4]" IOSTANDARD = "LVCMOS33";
NET "fpga_blo_in_i[4]" IOSTANDARD = LVCMOS33;
NET "fpga_blo_in_i[5]" LOC = Y7;
NET "fpga_blo_in_i[5]" IOSTANDARD = "LVCMOS33";
NET "fpga_blo_in_i[5]" IOSTANDARD = LVCMOS33;
NET "fpga_blo_in_i[6]" LOC = AA8;
NET "fpga_blo_in_i[6]" IOSTANDARD = "LVCMOS33";
NET "fpga_blo_in_i[6]" IOSTANDARD = LVCMOS33;
NET "fpga_trig_blo_o[1]" LOC = W9;
NET "fpga_trig_blo_o[1]" IOSTANDARD = "LVCMOS33";
NET "fpga_trig_blo_o[1]" IOSTANDARD = LVCMOS33;
NET "fpga_trig_blo_o[2]" LOC = T10;
NET "fpga_trig_blo_o[2]" IOSTANDARD = "LVCMOS33";
NET "fpga_trig_blo_o[2]" IOSTANDARD = LVCMOS33;
NET "fpga_trig_blo_o[3]" LOC = V7;
NET "fpga_trig_blo_o[3]" IOSTANDARD = "LVCMOS33";
NET "fpga_trig_blo_o[3]" IOSTANDARD = LVCMOS33;
NET "fpga_trig_blo_o[4]" LOC = U9;
NET "fpga_trig_blo_o[4]" IOSTANDARD = "LVCMOS33";
NET "fpga_trig_blo_o[4]" IOSTANDARD = LVCMOS33;
NET "fpga_trig_blo_o[5]" LOC = T8;
NET "fpga_trig_blo_o[5]" IOSTANDARD = "LVCMOS33";
NET "fpga_trig_blo_o[5]" IOSTANDARD = LVCMOS33;
NET "fpga_trig_blo_o[6]" LOC = R9;
NET "fpga_trig_blo_o[6]" IOSTANDARD = "LVCMOS33";
NET "fpga_trig_blo_o[6]" IOSTANDARD = LVCMOS33;
##=============================================================================
##-- VME CONNECTOR SIGNALS
......@@ -298,13 +298,13 @@ NET "fpga_gap_i" IOSTANDARD = LVCMOS33;
##-- ROM memory
##-----------------------------------------------------------------------------
NET "fpga_prom_cclk_o" LOC = Y20;
NET "fpga_prom_cclk_o" IOSTANDARD = "LVCMOS33";
NET "fpga_prom_cclk_o" IOSTANDARD = LVCMOS33;
NET "fpga_prom_cso_b_n_o" LOC = AA3;
NET "fpga_prom_cso_b_n_o" IOSTANDARD = "LVCMOS33";
NET "fpga_prom_cso_b_n_o" IOSTANDARD = LVCMOS33;
NET "fpga_prom_miso_i" LOC = AA20;
NET "fpga_prom_miso_i" IOSTANDARD = "LVCMOS33";
NET "fpga_prom_miso_i" IOSTANDARD = LVCMOS33;
NET "fpga_prom_mosi_o" LOC = AB20;
NET "fpga_prom_mosi_o" IOSTANDARD = "LVCMOS33";
NET "fpga_prom_mosi_o" IOSTANDARD = LVCMOS33;
##=============================================================================
##-- WHITE RABBIT
......@@ -335,21 +335,21 @@ NET "fpga_plldac2_sync_n_o" IOSTANDARD = LVCMOS33;
##-----------------------------------------------------------------------------
##-- SFP connection
##-----------------------------------------------------------------------------
NET "fpga_sfp_los_i" LOC = G3;
NET "fpga_sfp_los_i" IOSTANDARD = "LVCMOS33";
NET "fpga_sfp_mod_def0_i" LOC = K8;
NET "fpga_sfp_mod_def0_i" IOSTANDARD = "LVCMOS33";
NET "fpga_sfp_rate_select_o" LOC = C4;
NET "fpga_sfp_rate_select_o" IOSTANDARD = "LVCMOS33";
NET "fpga_sfp_los_i" LOC = G3;
NET "fpga_sfp_los_i" IOSTANDARD = LVCMOS33;
NET "fpga_sfp_mod_def0_i" LOC = K8;
NET "fpga_sfp_mod_def0_i" IOSTANDARD = LVCMOS33;
NET "fpga_sfp_rate_select_o" LOC = C4;
NET "fpga_sfp_rate_select_o" IOSTANDARD = LVCMOS33;
NET "fpga_sfp_mod_def1_b" LOC = G4;
NET "fpga_sfp_mod_def1_b" IOSTANDARD = LVCMOS33;
NET "fpga_sfp_mod_def2_b" LOC = F3;
NET "fpga_sfp_mod_def2_b" IOSTANDARD = LVCMOS33;
NET "fpga_sfp_tx_disable_o" LOC = E4;
NET "fpga_sfp_tx_disable_o" IOSTANDARD = "LVCMOS33";
NET "fpga_sfp_tx_fault_i" LOC = D2;
NET "fpga_sfp_tx_fault_i" IOSTANDARD = "LVCMOS33";
NET "fpga_sfp_tx_disable_o" LOC = E4;
NET "fpga_sfp_tx_disable_o" IOSTANDARD = LVCMOS33;
NET "fpga_sfp_tx_fault_i" LOC = D2;
NET "fpga_sfp_tx_fault_i" IOSTANDARD = LVCMOS33;
###-----------------------------------------------------------------------------
###-- FPGA MGT lines
......@@ -390,19 +390,19 @@ NET "fpga_inv_oe_o" SLEW = QUIETIO;
##-- Configuration Switches
##-----------------------------------------------------------------------------
NET "extra_switch_n_i[1]" LOC = F22;
NET "extra_switch_n_i[1]" IOSTANDARD = "LVCMOS33";
NET "extra_switch_n_i[1]" IOSTANDARD = LVCMOS33;
NET "extra_switch_n_i[2]" LOC = G22;
NET "extra_switch_n_i[2]" IOSTANDARD = "LVCMOS33";
NET "extra_switch_n_i[2]" IOSTANDARD = LVCMOS33;
NET "extra_switch_n_i[3]" LOC = H21;
NET "extra_switch_n_i[3]" IOSTANDARD = "LVCMOS33";
NET "extra_switch_n_i[3]" IOSTANDARD = LVCMOS33;
NET "extra_switch_n_i[4]" LOC = H22;
NET "extra_switch_n_i[4]" IOSTANDARD = "LVCMOS33";
NET "extra_switch_n_i[4]" IOSTANDARD = LVCMOS33;
NET "extra_switch_n_i[5]" LOC = J22;
NET "extra_switch_n_i[5]" IOSTANDARD = "LVCMOS33";
NET "extra_switch_n_i[5]" IOSTANDARD = LVCMOS33;
NET "extra_switch_n_i[6]" LOC = K21;
NET "extra_switch_n_i[6]" IOSTANDARD = "LVCMOS33";
NET "extra_switch_n_i[6]" IOSTANDARD = LVCMOS33;
NET "extra_switch_n_i[7]" LOC = K22;
NET "extra_switch_n_i[7]" IOSTANDARD = "LVCMOS33";
NET "extra_switch_n_i[7]" IOSTANDARD = LVCMOS33;
NET "ttl_switch_n_i" LOC = L22;
NET "ttl_switch_n_i" IOSTANDARD = LVCMOS33;
......
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