Commit b5ff33c9 authored by Theodor-Adrian Stana's avatar Theodor-Adrian Stana

Update pulsetest and regtest top-level files in light of wb_i2c_slave updates

parent d6aa4f02
......@@ -549,8 +549,20 @@ begin
-- Set the I2C address signal according to ELMA protocol [1]
i2c_addr <= "10" & fpga_ga_i;
-- Instantiate VBCP bridge component
-- Instantiate I2C bridge component
--
-- FSM watchdog timeout timer:
-- * consider bit period of 30 us
-- * 10 bits / byte transfer => 300 us
-- * 40 bytes in one transfer => 12000 us
-- * clk_i period = 50 ns => g_fsm_wdt = 12000 us / 50 ns = 240000
-- * multiply by two for extra safety => g_fsm_wdt = 480000
-- * Time to watchdog timeout: 480000 * 50ns = 24 ms
cmp_i2c_bridge : wb_i2c_bridge
generic map
(
g_fsm_wdt => 480000
)
port map
(
-- Clock, reset
......
......@@ -282,8 +282,20 @@ begin
-- Set the I2C address signal according to ELMA protocol [1]
i2c_addr <= "10" & fpga_ga_i;
-- Instantiate VBCP bridge component
-- Instantiate I2C bridge component
--
-- FSM watchdog timeout timer:
-- * consider bit period of 30 us
-- * 10 bits / byte transfer => 300 us
-- * 40 bytes in one transfer => 12000 us
-- * clk_i period = 50 ns => g_fsm_wdt = 12000 us / 50 ns = 240000
-- * multiply by two for extra safety => g_fsm_wdt = 480000
-- * Time to watchdog timeout: 480000 * 50ns = 24 ms
cmp_i2c_bridge : wb_i2c_bridge
generic map
(
g_fsm_wdt => 480000
)
port map
(
-- Clock, reset
......
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