Commit 8ad80376 authored by Denia Bouhired-Ferrag's avatar Denia Bouhired-Ferrag

Renamed some of conv-common-gw ports to avoid references to signal types (ttl or…

Renamed some of conv-common-gw ports to avoid references to signal types (ttl or blo) are yet to be changed. this is not a priority for release 4 of the gateware.
parent d6dc4968
......@@ -291,7 +291,7 @@ begin
-- This process has the effect of extending the reset an extra 100 us, to avoid
-- a pulse being generated or erroneously counted during the period of no signal
-- detect
p_inhibit_first_pulse : process (clk_20_i)
b : process (clk_20_i)
begin
if rising_edge(clk_20_i) then
if (rst_20_n = '0') then
......@@ -299,7 +299,7 @@ begin
inhibit_first_pulse <= '1';
elsif (inhibit_first_pulse = '1') then
inhibit_cnt <= inhibit_cnt + 1;
if (inhibit_cnt >= 1999 and and_reduce(ttl_n_i)='1') then
if (inhibit_cnt = 1999) then -- and and_reduce(ttl_n_i)='1') then
inhibit_first_pulse <= '0';
end if;
end if;
......@@ -415,8 +415,8 @@ begin
-- Front panel channels
pulse_i => pulse_in,
pulse_ttl_i => pulse_ttl,
pulse_blo_i => pulse_blo,
pulse_front_i => pulse_ttl,
pulse_rear_i => pulse_blo,
pulse_o => pulse_out,
-- Inverted pulse I/O
......
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