Small modifications to testbench file for burst control mode

89f1378b · Denia Bouhired-Ferrag · b7bd40e1 · 89f1378b
Commit 89f1378b authored Jan 13, 2017 by Denia Bouhired-Ferrag
Hide whitespace changes
Inline Side-by-side

Showing with 2 additions and 1 deletion

burst_ctrl_tb.vhd sim/Release/burst_ctrl_tb.vhd +2 -1

No files found.
--- a/sim/Release/burst_ctrl_tb.vhd
+++ b/sim/Release/burst_ctrl_tb.vhd
@@ -168,6 +168,7 @@ architecture behav of testbench is
  (
  g_pwidth 					=> 5, 
  g_1_pulse_temp_rise			=> x"1388",
+  --g_1_pulse_temp_rise			=> x"7A125",
  --g_max_temp			=> x"00000F4240" --10^6
  g_max_temp			=> x"02540BE400" --10^10
@@ -249,7 +250,7 @@ end process p_ran_gen;
 			interval := 250 ns;
 		end if;
 	else	
-		interval := 500 ns;
+		interval := 250 ns;
 	end if;
 	burst_train <= '0';
 	wait for interval;