hdl: Fixed a problem with the pulse counters
When the TTL selection switch is set for TTL-BAR signals, the pulse counters
were starting from the value 1. This was because the input channel is
first sent through a synchronizer FF chain, which was reset by the
same reset signal as the rest of the logic.
Due to the reset pulse inside the logic and the fact that when the TTL switch
is set to TTL-BAR, a non-existing signal represents a high level, this
high level was detected (due to the sync FF chain) only after the reset pulse.
This resulted in a rising edge on the trigger signal, which resulted in the
pulse counters incrementing to '1' on every reset.
This problem has been solved by not resetting the sync FF chain.
Signed-off-by: Theodor Stana <t.stana@cern.ch>
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