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Conv TTL Blocking - Gateware
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Conv TTL Blocking - Gateware
Commits
2cf1817b
Commit
2cf1817b
authored
Aug 22, 2014
by
Theodor-Adrian Stana
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Implemented (in conv-common-gw) a pulse synchronization scheme for the latest timestamp registers
parent
d7c5f80e
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conv-common-gw
ip_cores/conv-common-gw
+1
-1
conv_ttl_blo.vhd
top/Release/conv_ttl_blo.vhd
+1
-1
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conv-common-gw
@
183c2bae
Subproject commit
e1bfd7b08fe148c83b5bcc7a51ef4ed8eb1b6881
Subproject commit
183c2bae08345d564371299c0aa0f00d227789ed
top/Release/conv_ttl_blo.vhd
View file @
2cf1817b
...
...
@@ -164,7 +164,7 @@ architecture arch of conv_ttl_blo is
constant
c_board_id
:
std_logic_vector
(
31
downto
0
)
:
=
x"54424c4f"
;
-- Gateware version
constant
c_gwvers
:
std_logic_vector
(
7
downto
0
)
:
=
x"
23
"
;
constant
c_gwvers
:
std_logic_vector
(
7
downto
0
)
:
=
x"
30
"
;
--============================================================================
-- Type declarations
...
...
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