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Conv TTL Blocking - Gateware
Commit 2b66edb1 authored by Theodor-Adrian Stana's avatar Theodor-Adrian Stana
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Corrected DAC net names and changed the net name for the 20 MHz clock net in the UCF file

parent f8253d43
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Showing with 13 additions and 13 deletions
top/Release/conv_ttl_blo.ucf
View file @ 2b66edb1
......@@ -39,8 +39,8 @@
# CLOCKS AND OUTPUT RESET
#=============================================================================
NET "clk_20_i" LOC = E16;
NET "clk_20_i" TNM_NET = "clk_20_vcxo_i";
TIMESPEC TSCLK20 = PERIOD "clk_20_vcxo_i" 20 MHz HIGH 50 %;
NET "clk_20_i" TNM_NET = "clk_20_i";
TIMESPEC TSCLK20 = PERIOD "clk_20_i" 20 MHz HIGH 50 %;
NET "clk_125_p_i" LOC = H12;
NET "clk_125_n_i" LOC = G11;
......@@ -300,20 +300,20 @@ NET "vme_gap_i" IOSTANDARD = LVCMOS33;
#-----------------------------------------------------------------------------
# DAC control
#-----------------------------------------------------------------------------
NET "dac20_din_o" LOC = AB14;
NET "dac20_din_o" IOSTANDARD = LVCMOS33;
NET "dac20_sclk_o" LOC = AA14;
NET "dac20_sclk_o" IOSTANDARD = LVCMOS33;
NET "dac20_sync_n_o" LOC = AB15;
NET "dac20_sync_n_o" IOSTANDARD = LVCMOS33;
NET "dac125_din_o" LOC = W14;
NET "dac125_din_o" LOC = AB14;
NET "dac125_din_o" IOSTANDARD = LVCMOS33;
NET "dac125_sclk_o" LOC = Y14;
NET "dac125_sclk_o" LOC = AA14;
NET "dac125_sclk_o" IOSTANDARD = LVCMOS33;
NET "dac125_sync_n_o" LOC = W13;
NET "dac125_sync_n_o" LOC = AB15;
NET "dac125_sync_n_o" IOSTANDARD = LVCMOS33;
NET "dac20_din_o" LOC = W14;
NET "dac20_din_o" IOSTANDARD = LVCMOS33;
NET "dac20_sclk_o" LOC = Y14;
NET "dac20_sclk_o" IOSTANDARD = LVCMOS33;
NET "dac20_sync_n_o" LOC = W13;
NET "dac20_sync_n_o" IOSTANDARD = LVCMOS33;
#-----------------------------------------------------------------------------
# SFP connection
#-----------------------------------------------------------------------------
......
top/Release/conv_ttl_blo.vhd
View file @ 2b66edb1
......@@ -21,7 +21,7 @@
-- general-cores repository [1]
--
-- references:
-- [1] Platform-independent core collection webpage on OHWR,
-- [1] Platform-independent core collection on OHWR,
-- http://www.ohwr.org/projects/general-cores/repository
-- [2] ELMA, Access to board data using SNMP and I2C
-- http://www.ohwr.org/documents/227
......
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