Skip to content
Projects
Groups
Snippets
Help
Loading...
Sign in
Toggle navigation
C
Conv TTL Blocking - Gateware
Project
Project
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
1
Issues
1
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
Wiki
Wiki
image/svg+xml
Discourse
Discourse
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Commits
Issue Boards
Open sidebar
Projects
Conv TTL Blocking - Gateware
Commits
1ef22de7
Commit
1ef22de7
authored
Jan 07, 2014
by
Theodor-Adrian Stana
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
pulsetest: changed version number to 0xff
Signed-off-by:
Theodor Stana
<
t.stana@cern.ch
>
parent
68e5ac71
Hide whitespace changes
Inline
Side-by-side
Showing
2 changed files
with
2 additions
and
2 deletions
+2
-2
pulsetest.xise
syn/pulsetest/pulsetest.xise
+1
-1
pulsetest.vhd
top/pulsetest/pulsetest.vhd
+1
-1
No files found.
syn/pulsetest/pulsetest.xise
View file @
1ef22de7
...
@@ -175,7 +175,7 @@
...
@@ -175,7 +175,7 @@
<property
xil_pn:name=
"Optimization Effort spartan6"
xil_pn:value=
"Normal"
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"Optimization Effort spartan6"
xil_pn:value=
"Normal"
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"Optimization Goal"
xil_pn:value=
"Speed"
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"Optimization Goal"
xil_pn:value=
"Speed"
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"Optimize Instantiated Primitives"
xil_pn:value=
"false"
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"Optimize Instantiated Primitives"
xil_pn:value=
"false"
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"Other Bitgen Command Line Options spartan6"
xil_pn:value=
"
"
xil_pn:valueState=
"
default"
/>
<property
xil_pn:name=
"Other Bitgen Command Line Options spartan6"
xil_pn:value=
"
-g next_config_register_write:Disable"
xil_pn:valueState=
"non-
default"
/>
<property
xil_pn:name=
"Other Compiler Options"
xil_pn:value=
""
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"Other Compiler Options"
xil_pn:value=
""
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"Other Compiler Options Map"
xil_pn:value=
""
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"Other Compiler Options Map"
xil_pn:value=
""
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"Other Compiler Options Par"
xil_pn:value=
""
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"Other Compiler Options Par"
xil_pn:value=
""
xil_pn:valueState=
"default"
/>
...
...
top/pulsetest/pulsetest.vhd
View file @
1ef22de7
...
@@ -193,7 +193,7 @@ architecture behav of pulsetest is
...
@@ -193,7 +193,7 @@ architecture behav of pulsetest is
-- next major release v2.0 c_fwvers = x"20";
-- next major release v2.0 c_fwvers = x"20";
-- Test firmware gets numbered from v9.9 downward
-- Test firmware gets numbered from v9.9 downward
-- The pulse test firmware is v9.9
-- The pulse test firmware is v9.9
constant
c_fwvers
:
std_logic_vector
(
7
downto
0
)
:
=
x"
99
"
;
constant
c_fwvers
:
std_logic_vector
(
7
downto
0
)
:
=
x"
ff
"
;
-- Number of Wishbone masters and slaves, for wb_crossbar
-- Number of Wishbone masters and slaves, for wb_crossbar
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment