Commit 0c3e9fc3 authored by Theodor-Adrian Stana's avatar Theodor-Adrian Stana

hdl: moved modules/conv_pulse_gen.vhd to modules/Release/

Signed-off-by: Theodor-Adrian Stana's avatarTheodor Stana <t.stana@cern.ch>
parent 83b87d10
......@@ -7,7 +7,6 @@ modules = {
}
files = [
"conv_pulse_gen.vhd",
"reset_gen.vhd",
"rtm_detector.vhd"
]
files = [
"conv_regs.vhd",
"conv_pulse_gen.vhd",
"conv_man_trig.vhd"
];
......@@ -93,8 +93,8 @@ entity conv_pulse_gen is
-- Pulse output, active-high
-- latency:
-- glitch filter disabled: none
-- glitch filter enabled: g_gf_len+5 clk_i cycles
-- glitch filter disabled : none
-- glitch filter enabled : g_gf_len+6 clk_i cycles
pulse_o : out std_logic
);
end entity conv_pulse_gen;
......@@ -178,7 +178,7 @@ begin
if (pulse_rst = '1') then
pulse_gf_off <= '0';
elsif rising_edge(trig_a_i) then
if (en_i = '1') then
if (en_i = '1') and (gf_en_n_i = '1') then
pulse_gf_off <= '1';
end if;
end if;
......@@ -192,7 +192,7 @@ begin
pulse_gf_off_d0 <= '0';
pulse_gf_off_d1 <= '0';
pulse_gf_off_d2 <= '0';
elsif (en_i = '1') then
elsif (en_i = '1') and (gf_en_n_i = '1') then
pulse_gf_off_d0 <= pulse_gf_off;
pulse_gf_off_d1 <= pulse_gf_off_d0;
pulse_gf_off_d2 <= pulse_gf_off_d1;
......
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