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Conv TTL Blocking - Gateware
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Conv TTL Blocking - Gateware
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81fb23711d41e194bb5692ff58ea8abb83eead13
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regtest
regtest.ucf
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Changed system clock from 125MHz to 20MHz VCXO
· 81fb2371
Theodor-Adrian Stana
authored
Nov 20, 2013
Signed-off-by:
Theodor Stana
<
t.stana@cern.ch
>
81fb2371
regtest.ucf
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Theodor Stana <t.stana@cern.ch>