• Theodor-Adrian Stana's avatar
    Work on release v2.1 · 0dd7106c
    Theodor-Adrian Stana authored
    hdl:
    - substitute FIFO for ring buffer
    - change pulse repetition duty cycle to 1/500
    - renamed some files to make "generic" naming
    
    sim:
    - release: add I2C simulation capabilities
    - conv_pulse_gen: change testbench.vhd for simulating 1/500 duty cycle
    
    syn:
    - update project file with new files
    Signed-off-by: Theodor-Adrian Stana's avatarTheodor Stana <t.stana@cern.ch>
    0dd7106c
i2c_bus_model.vhd 3.19 KB