--==============================================================================
-- CERN (BE-CO-HT)
-- Top level entity of CONV-TTL-BLO
-- http://www.ohwr.org/projects/conv-ttl-blo
--==============================================================================
--
-- author: Theodor Stana (t.stana@cern.ch)
--         Carlos-Gil-Soriano
--
-- version: 1.0
--
-- description:
--    This is the top-level file for the CONV-TTL-BLO board. It instantiates all
--    components needed in the design and generates the necessary logic for
--    pulse conversion to occur on each channel.
--
--    Details about the HDL design can be found by reading the HDL guide of the
--    project in the doc/ folder.
--
-- dependencies:
--    general-cores repository [1]
--
-- references:
--   [1] Platform-independent core collection webpage on OHWR,
--       http://www.ohwr.org/projects/general-cores/repository
--   [2] ELMA, Access to board data using SNMP and I2C
--       http://www.ohwr.org/documents/227
--
--==============================================================================
-- GNU LESSER GENERAL PUBLIC LICENSE
--==============================================================================
-- This source file is free software; you can redistribute it and/or modify it
-- under the terms of the GNU Lesser General Public License as published by the
-- Free Software Foundation; either version 2.1 of the License, or (at your
-- option) any later version. This source is distributed in the hope that it
-- will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty
-- of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
-- See the GNU Lesser General Public License for more details. You should have
-- received a copy of the GNU Lesser General Public License along with this
-- source; if not, download it from http://www.gnu.org/licenses/lgpl-2.1.html
--==============================================================================
-- last changes:
--   26-11-2013   Theodor Stana       Changed file header
--==============================================================================
-- TODO: -
--==============================================================================
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

use work.gencores_pkg.all;
use work.wishbone_pkg.all;

use work.conv_common_gw_pkg.all;

entity conv_ttl_blo is
  port
  (
    -- Clocks
    clk_20_i                : in  std_logic;
    clk_125_p_i             : in  std_logic;
    clk_125_n_i             : in  std_logic;

    -- Active-low reset for blocking power supply
    mr_n_o                  : out std_logic;

    -- I2C interface
    scl_i                   : in  std_logic;
    scl_o                   : out std_logic;
    scl_en_o                : out std_logic;
    sda_i                   : in  std_logic;
    sda_o                   : out std_logic;
    sda_en_o                : out std_logic;

    -- VME interface
    vme_sysreset_n_i        : in  std_logic;
    vme_ga_i                : in  std_logic_vector(4 downto 0);
    vme_gap_i               : in  std_logic;

    -- Channel enable
    global_oen_o            : out std_logic;
    ttl_oen_o               : out std_logic;
    inv_oen_o               : out std_logic;
    blo_oen_o               : out std_logic;

    -- Front panel channels
    ttl_n_i                 : in  std_logic_vector(5 downto 0);
    ttl_o                   : out std_logic_vector(5 downto 0);
    inv_n_i                 : in  std_logic_vector(3 downto 0);
    inv_o                   : out std_logic_vector(3 downto 0);

    -- Rear panel channels
    blo_i                   : in  std_logic_vector(5 downto 0);
    blo_o                   : out std_logic_vector(5 downto 0);

    -- Channel leds
    led_front_n_o           : out std_logic_vector(5 downto 0);
    led_rear_n_o            : out std_logic_vector(5 downto 0);

    -- SPI interface to on-board flash chip
    flash_cs_n_o            : out std_logic;
    flash_sclk_o            : out std_logic;
    flash_mosi_o            : out std_logic;
    flash_miso_i            : in  std_logic;

    -- PLL DACs
    -- 20 MHz VCXO control
    dac20_din_o             : out std_logic;
    dac20_sclk_o            : out std_logic;
    dac20_sync_n_o          : out std_logic;
    -- 125 MHz clock generator control
    dac125_din_o            : out std_logic;
    dac125_sclk_o           : out std_logic;
    dac125_sync_n_o         : out std_logic;

    -- SFP lines
    sfp_los_i               : in    std_logic;
    sfp_mod_def0_i          : in    std_logic;
    sfp_rate_select_o       : out   std_logic;
    sfp_mod_def1_b          : inout std_logic;
    sfp_mod_def2_b          : inout std_logic;
    sfp_tx_disable_o        : out   std_logic;
    sfp_tx_fault_i          : in    std_logic;

    -- Thermometer data port
    thermometer_b           : inout std_logic;

    -- Switches
    sw_gp_n_i               : in   std_logic_vector(7 downto 0);

    -- RTM lines
    rtmm_i                  : in  std_logic_vector(2 downto 0);
    rtmp_i                  : in  std_logic_vector(2 downto 0);

    -- Front panel bicolor LEDs
    led_ctrl0_o             : out std_logic;
    led_ctrl0_oen_o         : out std_logic;
    led_ctrl1_o             : out std_logic;
    led_ctrl1_oen_o         : out std_logic;
    led_multicast_2_0_o     : out std_logic;
    led_multicast_3_1_o     : out std_logic;
    led_wr_gmt_ttl_ttln_o   : out std_logic;
    led_wr_link_syserror_o  : out std_logic;
    led_wr_ok_syspw_o       : out std_logic;
    led_wr_ownaddr_i2c_o    : out std_logic
  );
end entity conv_ttl_blo;


architecture arch of conv_ttl_blo is

  --============================================================================
  -- Constant declarations
  --============================================================================
  -- Number of repetition channels
  constant c_nr_chans          : integer  := 6;
  constant c_nr_inv_chans      : integer  := 4;

  -- Number of bicolor LED lines & columns
  constant c_bicolor_led_lines : integer  := 2;
  constant c_bicolor_led_cols  : integer  := 6;

  -- Board ID - ASCII string "TBLO"
  constant c_board_id : std_logic_vector(31 downto 0) := x"54424c4f";

  -- Gateware version
  constant c_gwvers   : std_logic_vector(7 downto 0) := x"23";

  --============================================================================
  -- Type declarations
  --============================================================================
  type t_ttlbar_nosig_cnt is array (c_nr_chans-1 downto 0) of unsigned(10 downto 0);

  --============================================================================
  -- Signal declarations
  --============================================================================
  -- Reset signal
  signal rst_20_n             : std_logic;

  -- TTL & RS485 signals
  signal rs485_fs             : std_logic_vector(c_nr_chans-1 downto 0);
  signal pulse_in             : std_logic_vector(c_nr_chans-1 downto 0);
  signal pulse_out            : std_logic_vector(c_nr_chans-1 downto 0);
  signal pulse_ttl            : std_logic_vector(c_nr_chans-1 downto 0);
  signal pulse_blo            : std_logic_vector(c_nr_chans-1 downto 0);
  signal inhibit_first_pulse  : std_logic;
  signal inhibit_cnt          : unsigned(10 downto 0);

  -- Line signals -- for reflection in line status register of conv_common_gw
  signal line_ttl             : std_logic_vector(c_nr_chans-1 downto 0);
  signal line_invttl          : std_logic_vector(3 downto 0);
  signal line_blo             : std_logic_vector(c_nr_chans-1 downto 0);

  -- Switch signals (for inverting switch inputs to the common g/w)
  signal sw_ttl               : std_logic;
  signal sw_gp                : std_logic_vector(7 downto 0);

  -- No signal on TTL-BAR
  signal ttlbar_nosig_cnt     : t_ttlbar_nosig_cnt;
  signal ttlbar_nosig_n       : std_logic_vector(c_nr_chans-1 downto 0);

  -- Channel LED signals
  signal led_pulse            : std_logic_vector(c_nr_chans-1 downto 0);
  signal led_rear             : std_logic_vector(c_nr_chans-1 downto 0);

  -- I2C LEDs
  signal led_i2c              : std_logic;

  -- System error LED
  signal led_syserr           : std_logic;

  -- Bicolor LED signals
  signal bicolor_led_state    : std_logic_vector(2*c_bicolor_led_cols*c_bicolor_led_lines-1 downto 0);
  signal bicolor_led_col      : std_logic_vector(c_bicolor_led_cols-1 downto 0);
  signal bicolor_led_line     : std_logic_vector(c_bicolor_led_lines-1 downto 0);
  signal bicolor_led_line_oen : std_logic_vector(c_bicolor_led_lines-1 downto 0);

--==============================================================================
--  architecture begin
--==============================================================================
begin

  --============================================================================
  -- Channel input logic
  --============================================================================
  -- TTL switch
  sw_ttl <= not sw_gp_n_i(7);

  -- The "no signal detect" block
  --
  -- If the signal line is high for 100 us, the ttlbar_nosig_n lines disable
  -- the input to the TTL side MUX and the OR gate.
  --
  -- The counter is disabled if the switch is set for TTL signals, to avoid
  -- unnecessary power consumption by the counter.
  p_ttlbar_nosig : process(clk_20_i)
  begin
    if rising_edge(clk_20_i) then
      for i in 0 to c_nr_chans-1 loop
        if (rst_20_n = '0') or (ttl_n_i(i) = '0') then
          ttlbar_nosig_n(i)   <= '1';
          ttlbar_nosig_cnt(i) <= (others => '0');
        elsif (sw_ttl = '0') then
          ttlbar_nosig_cnt(i) <= ttlbar_nosig_cnt(i) + 1;
          if (ttlbar_nosig_cnt(i) = 1999) then
            ttlbar_nosig_n(i)   <= '0';
            ttlbar_nosig_cnt(i) <= (others => '0');
          end if;
        end if;
      end loop;
    end if;
  end process p_ttlbar_nosig;

  -- TTL and blocking inputs
  pulse_ttl <= not ttl_n_i when sw_ttl = '1' else
               ttl_n_i and ttlbar_nosig_n;

  pulse_blo <= blo_i;

  -- This process has the effect of extending the reset an extra 100 us, to avoid
  -- a pulse being generated or erroneously counted during the period of no signal
  -- detect
  p_inhibit_first_pulse : process (clk_20_i)
  begin
    if rising_edge(clk_20_i) then
      if (rst_20_n = '0') then
        inhibit_cnt         <= (others => '0');
        inhibit_first_pulse <= '1';
      elsif (inhibit_first_pulse = '1') then
        inhibit_cnt <= inhibit_cnt + 1;
        if (inhibit_cnt = 1999) then
          inhibit_first_pulse <= '0';
        end if;
      end if;
    end if;
  end process p_inhibit_first_pulse;

  -- Pulse input valid only after inhibit period is over
  pulse_in <= (pulse_ttl or pulse_blo) when (inhibit_first_pulse = '0') else
              (others => '0');

  -- Line inputs for reflection in status register
  line_ttl    <= not ttl_n_i;
  line_invttl <= not inv_n_i;
  line_blo    <= blo_i;

  -- Switch inputs for reflection in status register
  sw_gp        <= not sw_gp_n_i;

  --============================================================================
  -- Instantiate common generic gateware for converter boards
  --============================================================================
  cmp_conv_common : conv_common_gw
    generic map
    (
      -- Number of repeater channels
      g_nr_chans            => c_nr_chans,
      g_board_id            => c_board_id,
      g_gwvers              => c_gwvers,
      g_pgen_fixed_width    => true,
      g_pgen_pwidth         => 24,
      g_pgen_duty_cycle_div => 200,
      g_pgen_gf_len         => 1,
      g_with_pulse_cnt      => true,
      g_with_pulse_timetag  => true,
      g_with_man_trig       => true,
      g_man_trig_pwidth     => 24,
      g_with_thermometer    => true,
      g_bicolor_led_columns => c_bicolor_led_cols,
      g_bicolor_led_lines   => c_bicolor_led_lines
    )
    port map
    (
      -- Clocks
      clk_20_i                => clk_20_i,
      clk_125_p_i             => clk_125_p_i,
      clk_125_n_i             => clk_125_n_i,

      -- Reset output signal, synchronous to 20 MHz clock
      rst_n_o                 => rst_20_n,

      -- Glitch filter active-low enable signal
      gf_en_n_i               => sw_gp_n_i(0),

      -- Channel enable
      global_ch_oen_o         => global_oen_o,
      pulse_front_oen_o       => ttl_oen_o,
      pulse_rear_oen_o        => blo_oen_o,
      inv_oen_o               => inv_oen_o,

      -- Front panel channels
      pulse_i                 => pulse_in,
      pulse_o                 => pulse_out,

      -- Channel leds
      led_pulse_o             => led_pulse,

      -- I2C LED signals -- conect to a bicolor LED of choice
      -- led_i2c_o pulses four times on I2C transfer
      led_i2c_o               => led_i2c,

      -- I2C interface
      scl_i                   => scl_i,
      scl_o                   => scl_o,
      scl_en_o                => scl_en_o,
      sda_i                   => sda_i,
      sda_o                   => sda_o,
      sda_en_o                => sda_en_o,

      -- VME interface
      vme_sysreset_n_i        => vme_sysreset_n_i,
      vme_ga_i                => vme_ga_i,
      vme_gap_i               => vme_gap_i,

      -- SPI interface to on-board flash chip
      flash_cs_n_o            => flash_cs_n_o,
      flash_sclk_o            => flash_sclk_o,
      flash_mosi_o            => flash_mosi_o,
      flash_miso_i            => flash_miso_i,

      -- PLL DACs
      -- 20 MHz VCXO control
      dac20_din_o             => dac20_din_o,
      dac20_sclk_o            => dac20_sclk_o,
      dac20_sync_n_o          => dac20_sync_n_o,
      -- 125 MHz clock generator control
      dac125_din_o            => dac125_din_o,
      dac125_sclk_o           => dac125_sclk_o,
      dac125_sync_n_o         => dac125_sync_n_o,

      -- SFP lines
      sfp_los_i               => sfp_los_i,
      sfp_mod_def0_i          => sfp_mod_def0_i,
      sfp_rate_select_o       => sfp_rate_select_o,
      sfp_mod_def1_b          => sfp_mod_def1_b,
      sfp_mod_def2_b          => sfp_mod_def2_b,
      sfp_tx_disable_o        => sfp_tx_disable_o,
      sfp_tx_fault_i          => sfp_tx_fault_i,

      -- Switch inputs (for readout from converter status register)
      sw_gp_i                 => sw_gp,
      sw_multicast_i          => (others => '0'),

      -- RTM lines
      rtmm_i                  => rtmm_i,
      rtmp_i                  => rtmp_i,

      -- TTL, INV-TTL and rear-panel channel inputs, for reflection in line status register
      line_front_i            => line_ttl,
      line_inv_i              => line_invttl,
      line_rear_i             => line_blo,
      line_rear_fs_i          => (others => '0'),

      -- Thermometer line
      thermometer_b           => thermometer_b,

      -- System error LED, active-high on system error
      -- ERR bicolor LED should light red when led_syserr_o = '1'
      led_syserr_o            => led_syserr,

      -- Bicolor LED signals
      bicolor_led_state_i     => bicolor_led_state,
      bicolor_led_col_o       => bicolor_led_col,
      bicolor_led_line_o      => bicolor_led_line,
      bicolor_led_line_oen_o  => bicolor_led_line_oen
    );

  --============================================================================
  -- Channel output logic
  --============================================================================
  -- TTL and RS-485 outputs
  ttl_o <= pulse_out when sw_ttl = '1' else
           not pulse_out;
  blo_o <= pulse_out;

  -- LED outputs
  led_front_n_o <= not led_pulse;
  led_rear_n_o  <= not led_pulse;

  -- INV-TTL outputs
  inv_o <= inv_n_i;

  --============================================================================
  -- Manual reset for blocking power supply
  --============================================================================
  mr_n_o <= rst_20_n;

  --============================================================================
  -- External logic for bicolor LED control
  --============================================================================
  -- Assign bicolor LED lines & columns to outputs
  led_wr_ownaddr_i2c_o   <= bicolor_led_col(0);
  led_wr_gmt_ttl_ttln_o  <= bicolor_led_col(1);
  led_wr_link_syserror_o <= bicolor_led_col(2);
  led_wr_ok_syspw_o      <= bicolor_led_col(3);
  led_multicast_2_0_o    <= bicolor_led_col(4);
  led_multicast_3_1_o    <= bicolor_led_col(5);
  led_ctrl0_o            <= bicolor_led_line(0);
  led_ctrl1_o            <= bicolor_led_line(1);
  led_ctrl0_oen_o        <= bicolor_led_line_oen(0);
  led_ctrl1_oen_o        <= bicolor_led_line_oen(1);

  -- WR address
  bicolor_led_state( 1 downto  0) <= c_LED_OFF;

  -- WR GMT
  bicolor_led_state( 3 downto  2) <= c_LED_OFF;

  -- WR link
  bicolor_led_state( 5 downto  4) <= c_LED_OFF;

  -- WR OK
  bicolor_led_state( 7 downto  6) <= c_LED_OFF;

  -- MULTICAST 0
  bicolor_led_state( 9 downto  8) <= c_LED_OFF;

  -- MULTICAST 1
  bicolor_led_state(11 downto 10) <= c_LED_OFF;

  -- I2C
  bicolor_led_state(13 downto 12) <= c_LED_GREEN when (led_i2c = '1') else
                                     c_LED_OFF;

  -- State of TTL/TTL_N switch
  bicolor_led_state(15 downto 14) <= c_LED_GREEN when (sw_ttl = '1') else
                                     c_LED_OFF;

  -- System error
  bicolor_led_state(17 downto 16) <= c_LED_RED when (led_syserr = '1') else
                                     c_LED_OFF;

  -- System power
  bicolor_led_state(19 downto 18) <= c_LED_GREEN;

  -- MULTICAST 2
  bicolor_led_state(21 downto 20) <= c_LED_OFF;

  -- MULTICAST 3
  bicolor_led_state(23 downto 22) <= c_LED_OFF;

end architecture arch;
--==============================================================================
--  architecture end
--==============================================================================
