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Converter Common Gateware
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Converter Common Gateware
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3a692ef1
Commit
3a692ef1
authored
Aug 20, 2014
by
Theodor-Adrian Stana
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Add manual pulse trigger and thermometer
parent
c1d3f39b
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3 changed files
with
222 additions
and
63 deletions
+222
-63
conv_man_trig.vhd
modules/conv_man_trig.vhd
+6
-7
conv_common_gw.vhd
top/conv_common_gw.vhd
+167
-54
conv_common_gw_pkg.vhd
top/conv_common_gw_pkg.vhd
+49
-2
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modules/conv_man_trig.vhd
View file @
3a692ef1
...
...
@@ -73,9 +73,8 @@ entity conv_man_trig is
-- Number of conversion channels
g_nr_chan
:
positive
:
=
6
;
-- Length of pulse generator glitch filter, needed to generate a long
-- enough pulse
g_gf_len
:
positive
:
=
1
-- Length of pulse in clk_i cycles generated at trig_o output
g_pwidth
:
positive
:
=
1
);
port
(
...
...
@@ -87,7 +86,7 @@ entity conv_man_trig is
reg_ld_i
:
in
std_logic
;
reg_i
:
in
std_logic_vector
(
7
downto
0
);
--
One-clock pulse output
--
Trigger output, g_pwidth long
trig_o
:
out
std_logic_vector
(
g_nr_chan
downto
1
)
);
end
entity
conv_man_trig
;
...
...
@@ -143,8 +142,8 @@ architecture behav of conv_man_trig is
-- Signal for the current state of the FSM
signal
state
:
t_state
;
-- Counter to
extend the pulse to the needed number of channels
signal
cnt
:
unsigned
(
f_log2_size
(
g_
gf_len
)
-1
downto
0
);
-- Counter to
create a pulse with width g_pwidth
signal
cnt
:
unsigned
(
f_log2_size
(
g_
pwidth
)
-1
downto
0
);
--==============================================================================
-- architecture begin
...
...
@@ -184,7 +183,7 @@ begin
end
if
;
when
GEN
=>
cnt
<=
cnt
+
1
;
if
(
cnt
=
g_
gf_len
-1
)
then
if
(
cnt
=
g_
pwidth
-1
)
then
state
<=
IDLE
;
end
if
;
when
others
=>
...
...
top/conv_common_gw.vhd
View file @
3a692ef1
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top/conv_common_gw_pkg.vhd
View file @
3a692ef1
...
...
@@ -43,6 +43,16 @@ use work.genram_pkg.all;
package
conv_common_gw_pkg
is
--============================================================================
-- Constant declarations
--============================================================================
-- Convenience constant if changes need be made later
--
-- Note that if you change this constant you will make conv-common-gw
-- _incompatible_ with BLO and RS-485 pulse repeaters and you will need to
-- _reimplement_ the conv_regs module
constant
c_max_nr_chans
:
natural
:
=
6
;
--============================================================================
-- Component declarations
--============================================================================
...
...
@@ -72,10 +82,17 @@ package conv_common_gw_pkg is
g_pgen_gf_len
:
integer
:
=
4
;
-- Generate logic with pulse counters
g_with_pulse_cnt
:
boolean
;
g_with_pulse_cnt
:
boolean
:
=
false
;
-- Generate logic with pulse counters
g_with_pulse_timetag
:
boolean
;
g_with_pulse_timetag
:
boolean
:
=
false
;
-- Generate logic with manual trigger
g_with_man_trig
:
boolean
:
=
false
;
g_man_trig_pwidth
:
integer
:
=
24
;
-- Generate one-wire master for thermometer
g_with_thermometer
:
boolean
:
=
false
;
-- Bicolor LED controller signals
g_bicolor_led_columns
:
integer
:
=
6
;
...
...
@@ -166,6 +183,9 @@ package conv_common_gw_pkg is
line_rear_i
:
in
std_logic_vector
(
g_nr_chans
-1
downto
0
);
line_rear_fs_i
:
in
std_logic_vector
(
g_nr_chans
-1
downto
0
);
-- Thermometer line
thermometer_b
:
inout
std_logic
;
-- Bicolor LED signals
bicolor_led_state_i
:
in
std_logic_vector
(
2
*
g_bicolor_led_columns
*
g_bicolor_led_lines
-1
downto
0
);
bicolor_led_col_o
:
out
std_logic_vector
(
g_bicolor_led_columns
-1
downto
0
);
...
...
@@ -494,5 +514,32 @@ package conv_common_gw_pkg is
);
end
component
conv_ring_buf
;
------------------------------------------------------------------------------
-- Manual trigger component
------------------------------------------------------------------------------
component
conv_man_trig
is
generic
(
-- Number of conversion channels
g_nr_chan
:
positive
:
=
6
;
-- Length of pulse in clk_i cycles generated at trig_o output
g_pwidth
:
positive
:
=
1
);
port
(
-- Clock, active-low inputs
clk_i
:
in
std_logic
;
rst_n_i
:
in
std_logic
;
-- Control inputs from conv_regs
reg_ld_i
:
in
std_logic
;
reg_i
:
in
std_logic_vector
(
7
downto
0
);
-- Trigger output, g_pwidth long
trig_o
:
out
std_logic_vector
(
g_nr_chan
downto
1
)
);
end
component
conv_man_trig
;
end
package
conv_common_gw_pkg
;
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