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C
CITY - CarrIer for RFoWR-based Timing sYstems
Commit 10c9a7b2 authored by Antonin Broquet's avatar Antonin Broquet
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remove circuit_board folder containing PCB project sources. PCB project sources… 

remove circuit_board folder containing PCB project sources. PCB project sources are provided in a zip file attached in project wiki. PCB project versionning has been moved to ESRF internal system.
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README.md
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......@@ -22,8 +22,6 @@ As this board has been developed for ESRF needs, it targets 352MHz RF frequency.
500MHz frequency support (for other synchrotron) is considered.
## Content
circuit_board: PCB design
hdl: VHDL source for application gateware (WR, RFoWR, programmable pulses and
clocks...)
......
circuit_board/.gitignore deleted 100644 → 0
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History
__Previews
*.htm
Project Logs *
Project Outputs *
*.Txt
*.txt
*.Dat
*.zip
PCB-Layout
!PCB-Layout/CITY-V2-0_pcb.PcbDoc
Manufacturing
Assembly*data
!Assembly*data/CITY-V2-0.OutJob
circuit_board/CITY-V2-0/CHANGES.TXT deleted 100755 → 0
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********************************************************************************
* CHANGES.TXT *
********************************************************************************
This design reuses three OHWR designs:
- FASEC : EDA-03288-V3-0
- FMC-DAC600-DDS : EDA-03010-V2-0
- FMC-DIO-5ch-TTL: EDA-02408-V2-0
Modifications made by Licensee.
CITY-V1-0
=========
EDA-03288-V3-0:
* Remove all ADC power supplies & references.
* Remove ADC input stages (SoC Bank 35 XADC diff. signals).
* Remove optional GTX signals (SoC Bank 112) with its USB connector.
* Remove Input, Output and Watchdog stages (SoC Bank 12-13-501 signals).
* Remove miscellaneous stages: LEDs controlled by PL/PL, I2C patch, interrupts,
FANs... (SoC Bank 12-13-501)
* Remove power controller GPIO (SoC Bank 35)
* Remove Clocks for WR as it is implemented with RFoWR design.
* Replace Ethernet PHY and MagJack connector. The original Ethernet PHY was a
switching PHY with no linux kernel support. As suggested by Licensor, it has
been replaced by a simpler PHY (Mervell 88E1518) with linux kernel support.
* Replace vertical miniUSB connector (SoC UART) to horizontal microUSB.
* Move USB UART chip & connector to back side, near RJ45 Ethernet connector.
* Move reset push button to back side.
* Move SFP connector to back side.
* Implement RFoWR design (EDA-03010-V2-0).
* Add MIO SPI1 bus in PS for RFoWR AD95xx interface.
* Add I2C peripherals.
* Add DIO stages.
* Add 10MHz BNC and PPS lemo.
EDA-03010-V2-0:
* AD9516 cleaner PLL replaced by an AD9510 + programmable VCXO.
* AD9516 White Rabbit PLL used for WRPTP Core and GTX reference clocks.
* Remove LVDS buffers between FPGA & DAC (MAX5890)
CITY-V2-0
=========
* Fix minor issues (see page of OHWR issues)
* Move PPS & 10MHz electrical level translator + drivers (issue #9)
* Replace SATA connector by SFP (issue #18)
* Re-routing FASEC original differential traces with new rule matching 100 ohm
impedance characteristic
********************************************************************************
circuit_board/CITY-V2-0/CITY-V2-0_project/CITY-V2-0.PrjPcb deleted 100755 → 0
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circuit_board/CITY-V2-0/CITY-V2-0_project/Schematics/CITY_DDS_DAC.Harness deleted 100755 → 0
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DAC_DAT=DAC0_P,DAC0_N,DAC1_P,DAC1_N,DAC2_P,DAC2_N,DAC3_P,DAC3_N,DAC4_P,DAC4_N,DAC5_P,DAC5_N,DAC6_P,DAC6_N,DAC7_P,DAC7_N,DAC8_P,DAC8_N,DAC9_P,DAC9_N,DAC10_P,DAC10_N,DAC11_P,DAC11_N,DAC12_P,DAC12_N,DAC13_P,DAC13_N
circuit_board/CITY-V2-0/CITY-V2-0_project/Schematics/CITY_Soc_bank35.Harness deleted 100755 → 0
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DAC_DAT=DAC0_P,DAC0_N,DAC1_P,DAC1_N,DAC2_P,DAC2_N,DAC3_P,DAC3_N,DAC4_P,DAC4_N,DAC5_P,DAC5_N,DAC6_P,DAC6_N,DAC7_P,DAC7_N,DAC8_P,DAC8_N,DAC9_P,DAC9_N,DAC10_P,DAC10_N,DAC11_P,DAC11_N,DAC12_P,DAC12_N,DAC13_P,DAC13_N
circuit_board/CITY-V2-0/CONTRIB.TXT deleted 100755 → 0
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********************************************************************************
* CONTRIB.TXT *
********************************************************************************
Contact point of any Licensor who wishes to receive modified Documentation:
antonin.broquet@esrf.fr
nicolas.janvier@esrf.fr
********************************************************************************
circuit_board/CITY-V2-0/PRODUCT.TXT deleted 100755 → 0
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********************************************************************************
* PRODUCT.TXT *
********************************************************************************
Contact point wishing to receive information about manufactured Products:
antonin.broquet@esrf.fr
********************************************************************************
circuit_board/README.md deleted 100644 → 0
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# PCB Design
Circuit board for CITY application.
Based on:
- FASEC design,
- FMC DAC 12b 1cha DDS
## Contents
CITY-V1-0: first version of PCB.
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