CERN Open Hardware Licence issueshttps://ohwr.org/project/cernohl/issues2020-03-12T11:28:33Zhttps://ohwr.org/project/cernohl/issues/11Explore whether we should add an explicit permission to relicense or sublicen...2020-03-12T11:28:33ZJavier SerranoExplore whether we should add an explicit permission to relicense or sublicense in -Phttps://ohwr.org/project/cernohl/issues/10Consider who should be able to enforce the CERN-OHL, and clarify2019-09-24T13:38:09ZAndrew KatzConsider who should be able to enforce the CERN-OHL, and clarifyMost open source licences only allow the licensor to enforce. The CERN-OHL potentially allows licensees to enforce. Should we:
1. Follow standard open source practice and only allow licensors to enforce?
2. Also allow Licensees exercising rights under the licence to enforce?
3. Allow any recipient of a CERN-OHL licensed Product the right to enforce?https://ohwr.org/project/cernohl/issues/9Proposed change in 3.3.d of -L and -S2019-09-24T15:14:57ZJavier SerranoProposed change in 3.3.d of -L and -STo make sure CERN-OHL-S and CERN-OHL-L allow including components licensed under permissive licenses, we could replace:
> license the modified Covered Source under the terms and conditions of this Licence or, as set out in 7.3, a later version, if permitted by the licence of the original Covered Source.
by:
> license the modified Covered Source, as a whole, under the terms and conditions of this Licence or, as set out in 7.3, a later version, if permitted by the licence of the original Covered Source.https://ohwr.org/project/cernohl/issues/8Align termination provisions more closely with GPLv32019-09-24T13:36:40ZAndrew KatzAlign termination provisions more closely with GPLv3The GPLv3 termination language (allowing a 30 day cure period) is becoming more of a standard in OSS (there is a project to back port it to selected GPLv2 projects https://sfconservancy.org/blog/2019/may/11/termination-backports/).
Our termination language should be more closely aligned with this.https://ohwr.org/project/cernohl/issues/7Dummy issue2019-07-02T14:11:47ZAndrew KatzDummy issueBlahhttps://ohwr.org/project/cernohl/issues/6Create raw text files for each one of the variants2020-03-12T11:24:51ZJavier SerranoCreate raw text files for each one of the variants80 columns maxJavier SerranoJavier Serranohttps://ohwr.org/project/cernohl/issues/5PCB schematics and layout use case: what about the symbol and footprint libra...2019-09-25T14:24:26ZJavier SerranoPCB schematics and layout use case: what about the symbol and footprint libraries?What do CERN-OHL-S and CERN-OHL-L say about the licensing regimes of the component libraries used in schematics and layout which are themselves licensed under those licences?Javier SerranoJavier Serranohttps://ohwr.org/project/cernohl/issues/4OHL 1.2: open verification code and proprietary RTL design2019-09-25T14:21:46ZAdrian FiergolskiOHL 1.2: open verification code and proprietary RTL designI would like to know whether an RTL design verified with a verification library distributed under OHL1.2, enforces that the RTL design itself must be released under the same OHL1.2 licence.
I developed a verification library and I would like to know if I can use it during the design of a proprietary chip.https://ohwr.org/project/cernohl/issues/3Add generator scripts in the enumeration of examples in the definition of "So...2019-09-24T15:48:30ZJavier SerranoAdd generator scripts in the enumeration of examples in the definition of "Source"There is not much difference in conceptual terms between a piece of software which generates, say, a piece of layout for an ASIC, and a piece of VHDL using generics. Therefore a generator written in Python should qualify for protection under CERN OHL. Suggested by Luca Alloatti and Thomas Kramer.Javier SerranoJavier Serranohttps://ohwr.org/project/cernohl/issues/2About PDK2019-09-25T14:09:37ZTristan GingoldAbout PDKThis is note from discussions I had during the FSiC2019 conference.
When you design an ASIC, you need to get a PDK from the foundry. The PDK consists mainly of a library of standard cells, rules for the design (DRC), various parameters... The licence of the PDK is usually very restrictive: you cannot publish anything derived from it. In particular, you cannot publish the layout of your design because it references the cells of the PDK. Even if you do full custom design (you design the transistors by hand), you are not allowed to publish your design because you used the rules or parameters from the PDK to do your design.
So it might be very difficult to use the CERN OHLv2 Less for an ASIC design with a restrictive PDK. Only the permissive licence would be possible.https://ohwr.org/project/cernohl/issues/1Complete Source definition2019-09-25T14:07:57ZTristan GingoldComplete Source definitionAs a non lawyer, I don't feel comfortable with the definition of Complete Source, as the extent of it is not clearly defined. Building a product may require a know-how, or parameters (like tolerances, precision...) that is not always easily expressed.
Honestly I don't see any universal solution to this problem.
Maybe the Licensor could specify what is the Complete Source. For example if I draw the schematics of an electronic design, the Complete Source of the product would be the schematics (of course), but also the PCB design, the BOM...