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Opened Sep 03, 2012 by Evangelia Gousiou@egousiou
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Users Wish: implementation of JC_TRST

Addition of JC_TRST: reset pin for remote JTAG updating.

User PA3 FPGA needs TRST to be driven. This can be implemented as external logic (see attachment),
but may require components that are not likely to be used in the rest of the design,
which would also need to be qualified in radiation.

Suggested JC_TRST Pin: 39

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  • nanoFIP_JTAG_JC.pdf
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Reference: project/cern-fip#1