Commit ed260e5e authored by Lucas Russo's avatar Lucas Russo

sm_io/modules/*: fix modules to use new protocol layer

Now, the protocol is "more" independent of the
higher layer. So, any specific changes to it
must be done explicitly by the caller.
parent d584f7b6
......@@ -55,24 +55,35 @@ smio_fmc130m_4ch_t * smio_fmc130m_4ch_new (smio_t *parent)
DBE_DEBUG (DBG_SM_IO | DBG_LVL_TRACE, "[sm_io:fmc130m_4ch_core] PCA9547 initializing, "
" addr: 0x%08X, Inst ID: %u\n", fmc130m_4ch_pca9547_addr[inst_id],
inst_id);
/* Create I2C protocol for pca9547 chip */
self->smpr_i2c_pca9547 = smpr_i2c_new (0, fmc130m_4ch_pca9547_addr[inst_id]);
ASSERT_ALLOC(self->smpr_i2c_pca9547, err_smpr_i2c_pca9547_alloc);
/* FPGA I2C Switch */
self->smch_pca9547 = smch_pca9547_new (parent, FMC_130M_EEPROM_I2C_OFFS,
fmc130m_4ch_pca9547_addr[inst_id], &smpr_proto_ops_i2c, 0);
smpr_i2c_get_ops (self->smpr_i2c_pca9547), 0);
ASSERT_ALLOC(self->smch_pca9547, err_smch_pca9547_alloc);
/* Enable default I2C channel */
smch_pca9547_en_chan (self->smch_pca9547, FMC130M_4CH_DFLT_PCA9547_CFG);
}
else {
self->smpr_i2c_pca9547 = NULL;
self->smch_pca9547 = NULL;
}
DBE_DEBUG (DBG_SM_IO | DBG_LVL_TRACE, "[sm_io:fmc130m_4ch_core] 24AA64 initializing, "
"addr: 0x%08X, Inst ID: %u\n", fmc130m_4ch_24aa64_addr[inst_id],
inst_id);
/* Create I2C protocol for 24aa64 chip */
self->smpr_i2c_24aa64 = smpr_i2c_new (0, fmc130m_4ch_24aa64_addr[inst_id]);
ASSERT_ALLOC(self->smpr_i2c_24aa64, err_smpr_i2c_24aa64_alloc);
/* EEPROM is on the same I2C bus as the LM75A */
self->smch_24aa64 = smch_24aa64_new (parent, FMC_130M_LM75A_I2C_OFFS,
fmc130m_4ch_24aa64_addr[inst_id], &smpr_proto_ops_i2c, 0);
smpr_i2c_get_ops (self->smpr_i2c_24aa64), 0);
ASSERT_ALLOC(self->smch_24aa64, err_smch_24aa64_alloc);
uint32_t data_24aa64;
......@@ -111,11 +122,21 @@ smio_fmc130m_4ch_t * smio_fmc130m_4ch_new (smio_t *parent)
return self;
#ifdef __FMC130M_4CH_EEPROM_PROGRAM__
err_smch_ad9510_alloc:
smch_24aa64_destroy (&self->smch_24aa64);
#endif
err_smch_24aa64_alloc:
smpr_i2c_destroy (&self->smpr_i2c_24aa64);
err_smpr_i2c_24aa64_alloc:
if (self->smch_pca9547 != NULL) {
smch_pca9547_destroy (&self->smch_pca9547);
}
err_smch_pca9547_alloc:
if (self->smpr_i2c_pca9547 != NULL) {
smpr_i2c_destroy (&self->smpr_i2c_pca9547);
}
err_smpr_i2c_pca9547_alloc:
err_num_fmc130m_4ch_smios:
free (self);
err_self_alloc:
......@@ -131,10 +152,14 @@ smio_err_e smio_fmc130m_4ch_destroy (smio_fmc130m_4ch_t **self_p)
smio_fmc130m_4ch_t *self = *self_p;
smch_24aa64_destroy (&self->smch_24aa64);
smpr_i2c_destroy (&self->smpr_i2c_24aa64);
if (self->smch_pca9547 != NULL) {
smch_pca9547_destroy (&self->smch_pca9547);
}
if (self->smpr_i2c_pca9547 != NULL) {
smpr_i2c_destroy (&self->smpr_i2c_pca9547);
}
free (self);
*self_p = NULL;
......
......@@ -28,7 +28,9 @@ typedef enum {
typedef struct {
fmc130m_4ch_type_e type; /* FMC130M_4CH type */
smpr_i2c_t *smpr_i2c_24aa64; /* I2C protocol handler */
smch_24aa64_t *smch_24aa64; /* 24AA64 chip handler */
smpr_i2c_t *smpr_i2c_pca9547; /* I2C protocol handler */
smch_pca9547_t *smch_pca9547; /* FPGA I2C Switch */
} smio_fmc130m_4ch_t;
......
......@@ -57,8 +57,11 @@ smio_fmc250m_4ch_t * smio_fmc250m_4ch_new (smio_t *parent)
inst_id);
/* FPGA I2C Switch */
#if 0
self->smpr_i2c_pca9547 = smpr_i2c_new (0, fmc250m_4ch_pca9547_addr[inst_id]);
ASSERT_ALLOC(self->smpr_i2c_pca9547, err_smpr_i2c_pca9547_alloc);
self->smch_pca9547 = smch_pca9547_new (parent, FMC_250M_EEPROM_I2C_OFFS,
fmc250m_4ch_pca9547_addr[inst_id], &smpr_proto_ops_i2c, 0);
smpr_i2c_get_ops (self->smpr_i2c_pca9547), 0);
ASSERT_ALLOC(self->smch_pca9547, err_smch_pca9547_alloc);
/* Enable default I2C channel */
......@@ -66,6 +69,7 @@ smio_fmc250m_4ch_t * smio_fmc250m_4ch_new (smio_t *parent)
}
else {
#endif
self->smpr_i2c_pca9547 = NULL;
self->smch_pca9547 = NULL;
}
......@@ -75,9 +79,15 @@ smio_fmc250m_4ch_t * smio_fmc250m_4ch_new (smio_t *parent)
DBE_DEBUG (DBG_SM_IO | DBG_LVL_INFO,
"[sm_io:fmc250m_4ch_core] pre new EEPROM 24AA64 data: 0x%08X\n", 0);
#if 0
/* Create I2C protocol for 24aa64 chip */
self->smpr_i2c_24aa64 = smpr_i2c_new (0, fmc250m_4ch_24aa64_addr[inst_id]);
ASSERT_ALLOC(self->smpr_i2c_24aa64, err_smpr_i2c_24aa64_alloc);
/* EEPROM is on the same I2C bus as the LM75A */
self->smch_24aa64 = smch_24aa64_new (parent, FMC_250M_EEPROM_I2C_OFFS,
fmc250m_4ch_24aa64_addr[inst_id], &smpr_proto_ops_i2c, 0);
self->smch_24aa64 = smch_24aa64_new (parent, FMC_250M_LM75A_I2C_OFFS,
smpr_i2c_get_ops (self->smpr_i2c_24aa64), 0);
ASSERT_ALLOC(self->smch_24aa64, err_smch_24aa64_alloc);
DBE_DEBUG (DBG_SM_IO | DBG_LVL_INFO,
"[sm_io:fmc250m_4ch_core] post new 24AA64 data: 0x%08X\n", 0);
ASSERT_ALLOC(self->smch_24aa64, err_smch_24aa64_alloc);
......@@ -128,9 +138,13 @@ smio_fmc250m_4ch_t * smio_fmc250m_4ch_new (smio_t *parent)
/* Setup ISLA216P ADC SPI communication */
uint32_t i;
for (i = 0; i < NUM_FMC250M_4CH_ISLA216P; ++i) {
/* Create SPI protocol for ISLA216P chips */
self->smpr_spi_isla216p_adc[i] = smpr_spi_new (fmc250m_4ch_isla216p_addr[inst_id][i], 1 /* addr_msb */);
ASSERT_ALLOC(self->smpr_spi_isla216p_adc[i], err_smpr_spi_isla216p_adc_alloc);
self->smch_isla216p_adc[i] = NULL;
self->smch_isla216p_adc[i] = smch_isla216p_new (parent, FMC_250M_ISLA216P_SPI_OFFS,
fmc250m_4ch_isla216p_addr[inst_id][i], &smpr_proto_ops_spi, 0);
smpr_spi_get_ops (self->smpr_spi_isla216p_adc[i]), 0);
ASSERT_ALLOC(self->smch_isla216p_adc[i], err_smch_isla216p_adc);
uint8_t chipid = 0;
......@@ -146,19 +160,31 @@ smio_fmc250m_4ch_t * smio_fmc250m_4ch_new (smio_t *parent)
return self;
err_smch_isla216p_adc:
for (i = 0; i < NUM_FMC250M_4CH_ISLA216P; ++i) {
smch_isla216p_destroy (&self->smch_isla216p_adc[i]);
}
err_smpr_spi_isla216p_adc_alloc:
for (i = 0; i < NUM_FMC250M_4CH_ISLA216P; ++i) {
smpr_spi_destroy (&self->smpr_spi_isla216p_adc[i]);
}
#if 0
#ifdef __FMC250M_4CH_EEPROM_PROGRAM__
err_smch_ad9510_alloc:
smch_24aa64_destroy (&self->smch_24aa64);
#endif
err_smch_24aa64_alloc:
smpr_i2c_destroy (&self->smpr_i2c_24aa64);
err_smpr_i2c_24aa64_alloc:
if (self->smch_pca9547 != NULL) {
smch_pca9547_destroy (&self->smch_pca9547);
}
#endif
#if 0
err_smch_pca9547_alloc:
#endif
err_smch_isla216p_adc:
for (i = 0; i < NUM_FMC250M_4CH_ISLA216P; ++i) {
smch_isla216p_destroy (&self->smch_isla216p_adc[i]);
if (self->smpr_i2c_pca9547 != NULL) {
smpr_i2c_destroy (&self->smpr_i2c_pca9547);
}
err_smpr_i2c_pca9547_alloc:
#endif
err_num_fmc250m_4ch_smios:
free (self);
err_self_alloc:
......@@ -173,16 +199,23 @@ smio_err_e smio_fmc250m_4ch_destroy (smio_fmc250m_4ch_t **self_p)
if (*self_p) {
smio_fmc250m_4ch_t *self = *self_p;
/* Destroy all ISLA216P instances */
uint32_t i;
for (i = 0; i < NUM_FMC250M_4CH_ISLA216P; ++i) {
smch_isla216p_destroy (&self->smch_isla216p_adc[i]);
}
for (i = 0; i < NUM_FMC250M_4CH_ISLA216P; ++i) {
smpr_spi_destroy (&self->smpr_spi_isla216p_adc[i]);
}
smch_24aa64_destroy (&self->smch_24aa64);
smpr_i2c_destroy (&self->smpr_i2c_24aa64);
if (self->smch_pca9547 != NULL) {
smch_pca9547_destroy (&self->smch_pca9547);
}
/* Destroy all ISLA216P instances */
uint32_t i;
for (i = 0; i < NUM_FMC250M_4CH_ISLA216P; ++i) {
smch_isla216p_destroy (&self->smch_isla216p_adc[i]);
if (self->smpr_i2c_pca9547 != NULL) {
smpr_i2c_destroy (&self->smpr_i2c_pca9547);
}
free (self);
......
......@@ -33,8 +33,11 @@ typedef struct {
#if 0
smch_amc7823_t *smch_amc7823; /* AMC7823 chip handler */
#endif
smpr_spi_t *smpr_spi_isla216p_adc[NUM_FMC250M_4CH_ISLA216P]; /* SPI protocol handler */
smch_isla216p_t *smch_isla216p_adc[NUM_FMC250M_4CH_ISLA216P]; /* ISLA216P chip handlers */
smpr_i2c_t *smpr_i2c_24aa64; /* I2C protocol handler */
smch_24aa64_t *smch_24aa64; /* 24AA64 chip handler */
smpr_i2c_t *smpr_i2c_pca9547; /* I2C protocol handler */
smch_pca9547_t *smch_pca9547; /* FPGA I2C Switch */
} smio_fmc250m_4ch_t;
......
......@@ -45,24 +45,36 @@ smio_fmc_active_clk_t * smio_fmc_active_clk_new (smio_t *parent)
DBE_DEBUG (DBG_SM_IO | DBG_LVL_TRACE, "[sm_io:fmc_active_clk_core] AD9510 initializing, "
"addr: 0x%08X, Inst ID: %u\n", fmc_active_clk_ad9510_addr,
inst_id);
/* Create SPI protocol for AD9510 chips */
self->smpr_spi_ad9510 = smpr_spi_new (fmc_active_clk_ad9510_addr, 1 /* addr_msb */);
ASSERT_ALLOC(self->smpr_spi_ad9510, err_smpr_spi_ad9510_alloc);
self->smch_ad9510 = smch_ad9510_new (parent, FMC_ACTIVE_CLK_AD9510_SPI_OFFS,
fmc_active_clk_ad9510_addr, &smpr_proto_ops_spi, 0);
smpr_spi_get_ops (self->smpr_spi_ad9510), 0);
ASSERT_ALLOC(self->smch_ad9510, err_smch_ad9510_alloc);
DBE_DEBUG (DBG_SM_IO | DBG_LVL_TRACE, "[sm_io:fmc_active_clk_core] SI571 initializing, "
"addr: 0x%08X, Inst ID: %u\n", fmc_active_clk_si571_addr,
inst_id);
/* Create I2C protocol for Si571 chips */
self->smpr_i2c_si571 = smpr_i2c_new (0, fmc_active_clk_si571_addr);
ASSERT_ALLOC(self->smpr_i2c_si571, err_smpr_i2c_si571_alloc);
self->smch_si571 = smch_si57x_new (parent, FMC_ACTIVE_CLK_SI571_I2C_OFFS,
fmc_active_clk_si571_addr, &smpr_proto_ops_i2c, 0);
smpr_i2c_get_ops (self->smpr_i2c_si571), 0);
ASSERT_ALLOC(self->smch_si571, err_smch_si571_alloc);
return self;
err_smch_si571_alloc:
if (self->smch_ad9510 != NULL) {
smch_ad9510_destroy (&self->smch_ad9510);
}
smpr_i2c_destroy (&self->smpr_i2c_si571);
err_smpr_i2c_si571_alloc:
smch_ad9510_destroy (&self->smch_ad9510);
err_smch_ad9510_alloc:
smpr_spi_destroy (&self->smpr_spi_ad9510);
err_smpr_spi_ad9510_alloc:
free (self);
err_self_alloc:
return NULL;
......@@ -77,7 +89,10 @@ smio_err_e smio_fmc_active_clk_destroy (smio_fmc_active_clk_t **self_p)
smio_fmc_active_clk_t *self = *self_p;
smch_si57x_destroy (&self->smch_si571);
smpr_i2c_destroy (&self->smpr_i2c_si571);
smch_ad9510_destroy (&self->smch_ad9510);
smpr_spi_destroy (&self->smpr_spi_ad9510);
free (self);
*self_p = NULL;
}
......
......@@ -12,7 +12,9 @@
#define SMIO_SI57X_HANDLER(smio_handler) ((smch_si57x_t *) smio_handler->smch_si571)
typedef struct {
smpr_spi_t *smpr_spi_ad9510; /* SPI protocol handler */
smch_ad9510_t *smch_ad9510; /* AD9510 chip handler */
smpr_i2c_t *smpr_i2c_si571; /* I2C protocol handler */
smch_si57x_t *smch_si571; /* SI571 chip handler */
} smio_fmc_active_clk_t;
......
......@@ -35,17 +35,21 @@
/* Creates a new instance of Device Information */
smio_rffe_t * smio_rffe_new (smio_t *parent)
{
(void) parent;
smio_rffe_t *self = (smio_rffe_t *) zmalloc (sizeof *self);
ASSERT_ALLOC(self, err_self_alloc);
self->ctl = smch_rffe_new (parent, &smpr_proto_ops_bsmp, 0);
ASSERT_ALLOC(self->ctl, err_rffe_alloc);
/* Create BSMP protocol for RFFE */
self->smpr_ctl = smpr_bsmp_new ();
ASSERT_ALLOC(self->smpr_ctl, err_smpr_ctl_alloc);
self->smch_ctl = smch_rffe_new (parent, smpr_bsmp_get_ops (self->smpr_ctl), 0);
ASSERT_ALLOC(self->smch_ctl, err_rffe_alloc);
return self;
err_rffe_alloc:
smpr_bsmp_destroy (&self->smpr_ctl);
err_smpr_ctl_alloc:
free (self);
err_self_alloc:
return NULL;
......@@ -59,7 +63,8 @@ smio_err_e smio_rffe_destroy (smio_rffe_t **self_p)
if (*self_p) {
smio_rffe_t *self = *self_p;
smch_rffe_destroy (&self->ctl);
smpr_bsmp_destroy (&self->smpr_ctl);
smch_rffe_destroy (&self->smch_ctl);
free (self);
*self_p = NULL;
}
......
......@@ -8,10 +8,11 @@
#ifndef _SM_IO_RFFE_CORE_H_
#define _SM_IO_RFFE_CORE_H_
#define SMIO_CTL_HANDLER(smio_handler) (smio_handler->ctl)
#define SMIO_CTL_HANDLER(smio_handler) (smio_handler->smch_ctl)
typedef struct {
smch_rffe_t *ctl;
smpr_bsmp_t *smpr_ctl;
smch_rffe_t *smch_ctl;
} smio_rffe_t;
/***************** Our methods *****************/
......
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