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Beam Positoning Monitor - Software
Commits
acbe7be1
Commit
acbe7be1
authored
Aug 10, 2016
by
Lucas Russo
Browse files
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Merge branch 'pluggable-ops' into devel
parents
2d4b7670
c178c603
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42 changed files
with
910 additions
and
640 deletions
+910
-640
README.md
README.md
+7
-2
bpm_server_classes.h
include/bpm_server_classes.h
+7
-0
ad9510_regs.h
include/chips/ad9510_regs.h
+13
-5
isla216p_regs.h
include/chips/isla216p_regs.h
+5
-5
dev_io_core.h
include/dev_io_core.h
+1
-1
sm_ch_24aa64.h
include/sm_ch_24aa64.h
+2
-5
sm_ch_ad9510.h
include/sm_ch_ad9510.h
+2
-2
sm_ch_isla216p.h
include/sm_ch_isla216p.h
+2
-2
sm_ch_pca9547.h
include/sm_ch_pca9547.h
+2
-2
sm_ch_rffe.h
include/sm_ch_rffe.h
+1
-1
sm_ch_si57x.h
include/sm_ch_si57x.h
+2
-5
sm_pr.h
include/sm_pr.h
+27
-30
sm_pr_bsmp.h
include/sm_pr_bsmp.h
+11
-4
sm_pr_i2c.h
include/sm_pr_i2c.h
+17
-2
sm_pr_spi.h
include/sm_pr_spi.h
+19
-2
ebpm.c
src/apps/ebpm/ebpm.c
+8
-1
dev_io_core.c
src/dev_io/dev_io_core.c
+9
-9
hutils_utils.h
src/libs/libhutils/include/hutils_utils.h
+7
-0
hutils_utils.c
src/libs/libhutils/src/hutils_utils.c
+18
-1
ll_io_core.h
src/libs/libllio/include/ll_io_core.h
+5
-2
ll_io_core.c
src/libs/libllio/src/ll_io_core.c
+14
-33
ll_io_eth.c
src/libs/libllio/src/ops/ll_io_eth.c
+1
-0
ll_io_pcie.c
src/libs/libllio/src/ops/ll_io_pcie.c
+2
-1
sm_ch_24aa64.c
src/sm_io/chips/sm_ch_24aa64.c
+22
-79
sm_ch_ad9510.c
src/sm_io/chips/sm_ch_ad9510.c
+23
-25
sm_ch_isla216p.c
src/sm_io/chips/sm_ch_isla216p.c
+33
-34
sm_ch_pca9547.c
src/sm_io/chips/sm_ch_pca9547.c
+17
-26
sm_ch_rffe.c
src/sm_io/chips/sm_ch_rffe.c
+14
-13
sm_ch_si57x.c
src/sm_io/chips/sm_ch_si57x.c
+21
-81
sm_io_acq_exp.c
src/sm_io/modules/acq/sm_io_acq_exp.c
+12
-8
sm_io_fmc130m_4ch_core.c
src/sm_io/modules/fmc130m_4ch/sm_io_fmc130m_4ch_core.c
+27
-2
sm_io_fmc130m_4ch_core.h
src/sm_io/modules/fmc130m_4ch/sm_io_fmc130m_4ch_core.h
+2
-0
sm_io_fmc250m_4ch_core.c
src/sm_io/modules/fmc250m_4ch/sm_io_fmc250m_4ch_core.c
+50
-17
sm_io_fmc250m_4ch_core.h
src/sm_io/modules/fmc250m_4ch/sm_io_fmc250m_4ch_core.h
+3
-0
sm_io_fmc_active_clk_core.c
src/sm_io/modules/fmc_active_clk/sm_io_fmc_active_clk_core.c
+20
-5
sm_io_fmc_active_clk_core.h
src/sm_io/modules/fmc_active_clk/sm_io_fmc_active_clk_core.h
+2
-0
sm_io_rffe_core.c
src/sm_io/modules/rffe/sm_io_rffe_core.c
+10
-5
sm_io_rffe_core.h
src/sm_io/modules/rffe/sm_io_rffe_core.h
+3
-2
sm_pr_bsmp.c
src/sm_io/protocols/ops/sm_pr_bsmp.c
+48
-3
sm_pr_i2c.c
src/sm_io/protocols/ops/sm_pr_i2c.c
+193
-115
sm_pr_spi.c
src/sm_io/protocols/ops/sm_pr_spi.c
+183
-52
sm_pr.c
src/sm_io/protocols/sm_pr.c
+45
-58
No files found.
README.md
View file @
acbe7be1
...
...
@@ -213,7 +213,8 @@ the PCIe kernel driver.
If the PCIe driver is already installed, you could
run it without superuser.
./compile.sh <board type = [ml605|afcv3]>
Usage: ./compile.sh [-b <board>] [-a <applications>] [-e <with examples = yes/no>]
[-l <with library linking = yes/no>] [-d <with driver = yes/no>] [-x <extra flags>]
### Client
...
...
@@ -223,10 +224,14 @@ Change to the Client API folder
Compile the library, with debug info
make ERRHAND_DBG=y ERRHAND_MIN_LEVEL=DBG_MIN_TRACE \
make
BOARD=<board>
ERRHAND_DBG=y ERRHAND_MIN_LEVEL=DBG_MIN_TRACE \
ERRHAND_SUBSYS_ON=’”(DBG_DEV_MNGR | DBG_DEV_IO | DBG_SM_IO | \
DBG_LIB_CLIENT | DBG_SM_PR | DBG_SM_CH | DBG_LL_IO | DBG_HAL_UTILS)”’
or
sudo ./compile.sh [<board>]
Install the library
sudo make install
...
...
include/bpm_server_classes.h
View file @
acbe7be1
...
...
@@ -77,6 +77,13 @@ typedef enum _smpr_err_e smpr_err_e;
/* Opaque sm_pr_t structure */
typedef
struct
_smpr_t
smpr_t
;
/* Opaque smpr_spi_t structure */
typedef
struct
_smpr_spi_t
smpr_spi_t
;
/* Opaque smpr_i2c_t structure */
typedef
struct
_smpr_i2c_t
smpr_i2c_t
;
/* Opaque smpr_bsmp_t structure */
typedef
struct
_smpr_bsmp_t
smpr_bsmp_t
;
/* Forward smch_err_e declaration enumeration */
typedef
enum
_smch_err_e
smch_err_e
;
/* Opaque sm_ch_24aa64_t structure */
...
...
include/chips/ad9510_regs.h
View file @
acbe7be1
...
...
@@ -24,18 +24,16 @@
#define WBGEN2_SIGN_EXTEND(value, bits) (((value) & (1<<bits) ? ~((1<<(bits))-1): 0 ) | (value))
#endif
#define AD9510_TRASNS_SIZE 24
/* in bits */
/* AD9510 Instruction Header for 24-bit transfers */
/* AD9510 Transfer type field */
#define AD9510_HDR_RW_SIZE 1
#define AD9510_HDR_RW_SHIFT
23
#define AD9510_HDR_RW_SHIFT
15
#define AD9510_HDR_RW WBGEN2_GEN_MASK(AD9510_HDR_RW_SHIFT, \
AD9510_HDR_RW_SIZE)
/* AD9510 Byte transfer field */
#define AD9510_HDR_BT_SIZE 2
#define AD9510_HDR_BT_SHIFT
21
#define AD9510_HDR_BT_SHIFT
13
#define AD9510_HDR_BT_MASK WBGEN2_GEN_MASK(AD9510_HDR_BT_SHIFT, \
AD9510_HDR_BT_SIZE)
#define AD9510_HDR_BT_W(value) WBGEN2_GEN_WRITE(value, AD9510_HDR_BT_SHIFT, \
...
...
@@ -46,7 +44,7 @@
/* AD9510 Address field. Only the bits 0 to 6 are available. The remaining 7 to 12
* are fixed to 0, as mandated by the AD9510 rev. B datasheet */
#define AD9510_HDR_ADDR_SIZE 7
#define AD9510_HDR_ADDR_SHIFT
8
#define AD9510_HDR_ADDR_SHIFT
0
#define AD9510_HDR_ADDR_MASK WBGEN2_GEN_MASK(AD9510_HDR_ADDR_SHIFT, \
AD9510_HDR_ADDR_SIZE)
#define AD9510_HDR_ADDR_W(value) WBGEN2_GEN_WRITE(value, AD9510_HDR_ADDR_SHIFT, \
...
...
@@ -54,6 +52,14 @@
#define AD9510_HDR_ADDR_R(reg) WBGEN2_GEN_READ(reg, AD9510_HDR_ADDR_SHIFT, \
AD9510_HDR_ADDR_SIZE)
/* Pad bytes to 16-bit */
#define AD9510_HDR_ADDR_PAD_SIZE 6
#define AD9510_INSTADDR_SIZE (AD9510_HDR_RW_SIZE + \
AD9510_HDR_BT_SIZE + \
AD9510_HDR_ADDR_PAD_SIZE + \
AD9510_HDR_ADDR_SIZE)
/* AD9510 Data for 24-bit transfers */
#define AD9510_DATA_SIZE 8
#define AD9510_DATA_SHIFT 0
...
...
@@ -64,6 +70,8 @@
#define AD9510_DATA_R(reg) WBGEN2_GEN_READ(reg, AD9510_DATA_SHIFT, \
AD9510_DATA_SIZE)
#define AD9510_TRANS_SIZE (AD9510_INSTADDR_SIZE+AD9510_DATA_SIZE)
/* in bits */
/* AD9510 Register map, as described by the AD9510 reb. B datasheet. Not all of them
* are descried here, just the ones we use */
#define AD9510_REG_CFG_SERIAL 0x00
...
...
include/chips/isla216p_regs.h
View file @
acbe7be1
...
...
@@ -44,13 +44,13 @@
/* ISLA216P Transfer type field */
#define ISLA216P_HDR_RW_SIZE 1
#define ISLA216P_HDR_RW_SHIFT
23
#define ISLA216P_HDR_RW_SHIFT
15
#define ISLA216P_HDR_RW WBGEN2_GEN_MASK(ISLA216P_HDR_RW_SHIFT, \
ISLA216P_HDR_RW_SIZE)
/* ISLA216P Byte transfer field */
#define ISLA216P_HDR_BT_SIZE 2
#define ISLA216P_HDR_BT_SHIFT
21
#define ISLA216P_HDR_BT_SHIFT
13
#define ISLA216P_HDR_BT_MASK WBGEN2_GEN_MASK(ISLA216P_HDR_BT_SHIFT, \
ISLA216P_HDR_BT_SIZE)
#define ISLA216P_HDR_BT_W(value) WBGEN2_GEN_WRITE(value, ISLA216P_HDR_BT_SHIFT, \
...
...
@@ -60,7 +60,7 @@
/* ISLA216P Address field */
#define ISLA216P_HDR_ADDR_SIZE 13
#define ISLA216P_HDR_ADDR_SHIFT
8
#define ISLA216P_HDR_ADDR_SHIFT
0
#define ISLA216P_HDR_ADDR_MASK WBGEN2_GEN_MASK(ISLA216P_HDR_ADDR_SHIFT, \
ISLA216P_HDR_ADDR_SIZE)
#define ISLA216P_HDR_ADDR_W(value) WBGEN2_GEN_WRITE(value, ISLA216P_HDR_ADDR_SHIFT, \
...
...
@@ -275,8 +275,8 @@
ISLA216P_NAPSLP_SIZE)
#define ISLA216P_NAPSLP_PIN_CONTROL 0
#define ISLA216P_NAPSLP_NORMAL_OPERATION (1<<0)
#define ISLA216P_NAPSLP_NAP_MODE (1<<1)
#define ISLA216P_NAPSLP_SLEEP_MODE (1<<2)
#define ISLA216P_NAPSLP_NAP_MODE (1<<1)
#define ISLA216P_NAPSLP_SLEEP_MODE (1<<2)
#endif
include/dev_io_core.h
View file @
acbe7be1
...
...
@@ -56,7 +56,7 @@ typedef struct {
/* Creates a new instance of Device Information */
devio_t
*
devio_new
(
char
*
name
,
uint32_t
id
,
char
*
endpoint_dev
,
llio_type_e
type
,
char
*
endpoint_broker
,
int
verbose
,
const
llio_ops_t
*
reg_ops
,
char
*
endpoint_broker
,
int
verbose
,
const
char
*
log_file_name
);
/* Destroy an instance of the Device Information */
devio_err_e
devio_destroy
(
devio_t
**
self_p
);
...
...
include/sm_ch_24aa64.h
View file @
acbe7be1
...
...
@@ -15,8 +15,8 @@ extern "C" {
/***************** Our methods *****************/
/* Creates a new instance of the SMCH 24AA64 */
smch_24aa64_t
*
smch_24aa64_new
(
smio_t
*
parent
,
uint64_t
base
,
uint32_t
addr
,
int
verbose
);
smch_24aa64_t
*
smch_24aa64_new
(
smio_t
*
parent
,
uint64_t
base
,
const
smpr_proto_ops_t
*
reg_ops
,
int
verbose
);
/* Destroy an instance of the SMCH 24AA64 */
smch_err_e
smch_24aa64_destroy
(
smch_24aa64_t
**
self_p
);
...
...
@@ -30,9 +30,6 @@ smch_err_e smch_24aa64_write_block (smch_24aa64_t *self, uint16_t addr, const ui
smch_err_e
smch_24aa64_read_block
(
smch_24aa64_t
*
self
,
uint16_t
addr
,
uint32_t
*
data
,
size_t
size
);
/* Probe bus for I2C devices */
ssize_t
smch_24aa64_probe_bus
(
smch_24aa64_t
*
self
);
#ifdef __cplusplus
}
#endif
...
...
include/sm_ch_ad9510.h
View file @
acbe7be1
...
...
@@ -15,8 +15,8 @@ extern "C" {
/***************** Our methods *****************/
/* Creates a new instance of the SMCH AD9510 */
smch_ad9510_t
*
smch_ad9510_new
(
smio_t
*
parent
,
uint64_t
base
,
uint32_t
ss
,
int
verbose
);
smch_ad9510_t
*
smch_ad9510_new
(
smio_t
*
parent
,
uint64_t
base
,
const
smpr_proto_ops_t
*
reg_ops
,
int
verbose
);
/* Destroy an instance of the SMCH AD9510 */
smch_err_e
smch_ad9510_destroy
(
smch_ad9510_t
**
self_p
);
...
...
include/sm_ch_isla216p.h
View file @
acbe7be1
...
...
@@ -15,8 +15,8 @@ extern "C" {
/***************** Our methods *****************/
/* Creates a new instance of the SMCH ISLA216P */
smch_isla216p_t
*
smch_isla216p_new
(
smio_t
*
parent
,
uint64_t
base
,
uint32_t
ss
,
int
verbose
);
smch_isla216p_t
*
smch_isla216p_new
(
smio_t
*
parent
,
uint64_t
base
,
const
smpr_proto_ops_t
*
reg_ops
,
int
verbose
);
/* Destroy an instance of the SMCH ISLA216P */
smch_err_e
smch_isla216p_destroy
(
smch_isla216p_t
**
self_p
);
...
...
include/sm_ch_pca9547.h
View file @
acbe7be1
...
...
@@ -17,8 +17,8 @@ extern "C" {
/***************** Our methods *****************/
/* Creates a new instance of the SMCH PCA9547 */
smch_pca9547_t
*
smch_pca9547_new
(
smio_t
*
parent
,
uint64_t
base
,
uint32_t
addr
,
int
verbose
);
smch_pca9547_t
*
smch_pca9547_new
(
smio_t
*
parent
,
uint64_t
base
,
const
smpr_proto_ops_t
*
reg_ops
,
int
verbose
);
/* Destroy an instance of the SMCH PCA9547 */
smch_err_e
smch_pca9547_destroy
(
smch_pca9547_t
**
self_p
);
...
...
include/sm_ch_rffe.h
View file @
acbe7be1
...
...
@@ -15,7 +15,7 @@ extern "C" {
/***************** Our methods *****************/
/* Creates a new instance of the SMCH RFFE */
smch_rffe_t
*
smch_rffe_new
(
smio_t
*
parent
,
int
verbose
);
smch_rffe_t
*
smch_rffe_new
(
smio_t
*
parent
,
const
smpr_proto_ops_t
*
reg_ops
,
int
verbose
);
/* Destroy an instance of the SMCH RFFE */
smch_err_e
smch_rffe_destroy
(
smch_rffe_t
**
self_p
);
...
...
include/sm_ch_si57x.h
View file @
acbe7be1
...
...
@@ -15,8 +15,8 @@ extern "C" {
/***************** Our methods *****************/
/* Creates a new instance of the SMCH SI57X */
smch_si57x_t
*
smch_si57x_new
(
smio_t
*
parent
,
uint64_t
base
,
uint32_t
addr
,
int
verbose
);
smch_si57x_t
*
smch_si57x_new
(
smio_t
*
parent
,
uint64_t
base
,
const
smpr_proto_ops_t
*
reg_ops
,
int
verbose
);
/* Destroy an instance of the SMCH SI57X */
smch_err_e
smch_si57x_destroy
(
smch_si57x_t
**
self_p
);
...
...
@@ -30,9 +30,6 @@ smch_err_e smch_si57x_read_8 (smch_si57x_t *self, uint8_t addr,
smch_err_e
smch_si57x_read_block
(
smch_si57x_t
*
self
,
uint8_t
addr
,
uint8_t
*
data
,
size_t
size
);
/* Probe bus for I2C devices */
ssize_t
smch_si57x_probe_bus
(
smch_si57x_t
*
self
);
/* Get Si57X divider values */
smch_err_e
smch_si57x_get_divs
(
smch_si57x_t
*
self
,
uint64_t
*
rfreq
,
unsigned
int
*
n1
,
unsigned
int
*
hs_div
);
...
...
include/sm_pr.h
View file @
acbe7be1
...
...
@@ -19,37 +19,29 @@ extern "C" {
#define SMPR_WB_REG_2_BYTE 4
/* 32-bit word */
#define SMPR_WB_REG_2_BIT (SMPR_WB_REG_2_BYTE*SMPR_BYTE_2_BIT)
typedef
enum
{
SMPR_SPI
=
0
,
SMPR_I2C
,
SMPR_BSMP
,
SMPR_1WIRE
,
SMPR_GPIO
,
SMPR_BYPASS
}
smpr_type_e
;
/* Open protocol */
typedef
int
(
*
proto_open_fp
)
(
smpr_t
*
self
,
uint64_t
base
,
void
*
args
);
/* Release protocol */
typedef
int
(
*
proto_release_fp
)
(
smpr_t
*
self
);
/* Read data from protocol */
typedef
ssize_t
(
*
proto_read_16_fp
)
(
smpr_t
*
self
,
uint64_t
offs
,
uint16_t
*
data
,
uint32_t
flags
);
typedef
ssize_t
(
*
proto_read_32_fp
)
(
smpr_t
*
self
,
uint64_t
offs
,
uint32_t
*
data
,
uint32_t
flags
);
typedef
ssize_t
(
*
proto_read_64_fp
)
(
smpr_t
*
self
,
uint64_t
offs
,
uint64_t
*
data
,
uint32_t
flags
);
typedef
ssize_t
(
*
proto_read_16_fp
)
(
smpr_t
*
self
,
size_t
size_offs
,
uint64_t
offs
,
uint16_t
*
data
);
typedef
ssize_t
(
*
proto_read_32_fp
)
(
smpr_t
*
self
,
size_t
size_offs
,
uint64_t
offs
,
uint32_t
*
data
);
typedef
ssize_t
(
*
proto_read_64_fp
)
(
smpr_t
*
self
,
size_t
size_offs
,
uint64_t
offs
,
uint64_t
*
data
);
/* Write data to protocol */
typedef
ssize_t
(
*
proto_write_16_fp
)
(
smpr_t
*
self
,
uint64_t
offs
,
const
uint16_t
*
data
,
uint32_t
flags
);
typedef
ssize_t
(
*
proto_write_32_fp
)
(
smpr_t
*
self
,
uint64_t
offs
,
const
uint32_t
*
data
,
uint32_t
flags
);
typedef
ssize_t
(
*
proto_write_64_fp
)
(
smpr_t
*
self
,
uint64_t
offs
,
const
uint64_t
*
data
,
uint32_t
flags
);
typedef
ssize_t
(
*
proto_write_16_fp
)
(
smpr_t
*
self
,
size_t
size_offs
,
uint64_t
offs
,
const
uint16_t
*
data
);
typedef
ssize_t
(
*
proto_write_32_fp
)
(
smpr_t
*
self
,
size_t
size_offs
,
uint64_t
offs
,
const
uint32_t
*
data
);
typedef
ssize_t
(
*
proto_write_64_fp
)
(
smpr_t
*
self
,
size_t
size_offs
,
uint64_t
offs
,
const
uint64_t
*
data
);
/* Read data block from protocol, size in bytes */
typedef
ssize_t
(
*
proto_read_block_fp
)
(
smpr_t
*
self
,
uint64_t
offs
,
size_t
size
,
uint32_t
*
data
,
uint32_t
flags
);
typedef
ssize_t
(
*
proto_read_block_fp
)
(
smpr_t
*
self
,
size_t
size_offs
,
uint64_t
offs
,
size_t
size
,
uint32_t
*
data
);
/* Write data block from protocol, size in bytes */
typedef
ssize_t
(
*
proto_write_block_fp
)
(
smpr_t
*
self
,
uint64_t
offs
,
size_t
size
,
const
uint32_t
*
data
,
uint32_t
flags
);
typedef
ssize_t
(
*
proto_write_block_fp
)
(
smpr_t
*
self
,
size_t
size_offs
,
uint64_t
offs
,
size_t
size
,
const
uint32_t
*
data
);
/* Read data block via DMA from protocol, size in bytes */
typedef
ssize_t
(
*
proto_read_dma_fp
)
(
smpr_t
*
self
,
uint64_t
offs
,
size_t
size
,
uint32_t
*
data
,
uint32_t
flags
);
typedef
ssize_t
(
*
proto_read_dma_fp
)
(
smpr_t
*
self
,
size_t
size_offs
,
uint64_t
offs
,
size_t
size
,
uint32_t
*
data
);
/* Write data block via DMA from protocol, size in bytes */
typedef
ssize_t
(
*
proto_write_dma_fp
)
(
smpr_t
*
self
,
uint64_t
offs
,
size_t
size
,
const
uint32_t
*
data
,
uint32_t
flags
);
typedef
ssize_t
(
*
proto_write_dma_fp
)
(
smpr_t
*
self
,
size_t
size_offs
,
uint64_t
offs
,
size_t
size
,
const
uint32_t
*
data
);
typedef
struct
{
const
char
*
proto_name
;
/* Protocol name */
proto_open_fp
proto_open
;
/* Open protocol */
proto_release_fp
proto_release
;
/* Release protocol */
proto_read_16_fp
proto_read_16
;
/* Read 16-bit data */
...
...
@@ -71,7 +63,8 @@ typedef struct {
/***************** Our methods *****************/
/* Creates a new instance of the Low-level I/O */
smpr_t
*
smpr_new
(
char
*
name
,
smio_t
*
parent
,
smpr_type_e
type
,
int
verbose
);
smpr_t
*
smpr_new
(
char
*
name
,
smio_t
*
parent
,
const
smpr_proto_ops_t
*
reg_ops
,
int
verbose
);
/* Destroy an instance of the Low-level I/O */
smpr_err_e
smpr_destroy
(
smpr_t
**
self_p
);
/* Register Specific Protocol operations to smpr instance */
...
...
@@ -82,6 +75,10 @@ void *smpr_get_handler (smpr_t *self);
void
*
smpr_unset_handler
(
smpr_t
*
self
);
/* Get parent handler */
smio_t
*
smpr_get_parent
(
smpr_t
*
self
);
/* Get ops */
const
smpr_proto_ops_t
*
smpr_get_ops
(
smpr_t
*
self
);
/* Get protocol name */
const
char
*
smpr_get_ops_name
(
smpr_t
*
self
);
/************************************************************/
/***************** Thsafe generic methods API ***************/
...
...
@@ -92,21 +89,21 @@ int smpr_open (smpr_t *self, uint64_t base, void *args);
/* Release protocol */
int
smpr_release
(
smpr_t
*
self
);
/* Read data from protocol */
ssize_t
smpr_read_16
(
smpr_t
*
self
,
uint64_t
offs
,
uint16_t
*
data
,
uint32_t
flags
);
ssize_t
smpr_read_32
(
smpr_t
*
self
,
uint64_t
offs
,
uint32_t
*
data
,
uint32_t
flags
);
ssize_t
smpr_read_64
(
smpr_t
*
self
,
uint64_t
offs
,
uint64_t
*
data
,
uint32_t
flags
);
ssize_t
smpr_read_16
(
smpr_t
*
self
,
size_t
size_offs
,
uint64_t
offs
,
uint16_t
*
data
);
ssize_t
smpr_read_32
(
smpr_t
*
self
,
size_t
size_offs
,
uint64_t
offs
,
uint32_t
*
data
);
ssize_t
smpr_read_64
(
smpr_t
*
self
,
size_t
size_offs
,
uint64_t
offs
,
uint64_t
*
data
);
/* Write data to protocol */
ssize_t
smpr_write_16
(
smpr_t
*
self
,
uint64_t
offs
,
const
uint16_t
*
data
,
uint32_t
flags
);
ssize_t
smpr_write_32
(
smpr_t
*
self
,
uint64_t
offs
,
const
uint32_t
*
data
,
uint32_t
flags
);
ssize_t
smpr_write_64
(
smpr_t
*
self
,
uint64_t
offs
,
const
uint64_t
*
data
,
uint32_t
flags
);
ssize_t
smpr_write_16
(
smpr_t
*
self
,
size_t
size_offs
,
uint64_t
offs
,
const
uint16_t
*
data
);
ssize_t
smpr_write_32
(
smpr_t
*
self
,
size_t
size_offs
,
uint64_t
offs
,
const
uint32_t
*
data
);
ssize_t
smpr_write_64
(
smpr_t
*
self
,
size_t
size_offs
,
uint64_t
offs
,
const
uint64_t
*
data
);
/* Read data block from protocol, size in bytes */
ssize_t
smpr_read_block
(
smpr_t
*
self
,
uint64_t
offs
,
size_t
size
,
uint32_t
*
data
,
uint32_t
flags
);
ssize_t
smpr_read_block
(
smpr_t
*
self
,
size_t
size_offs
,
uint64_t
offs
,
size_t
size
,
uint32_t
*
data
);
/* Write data block from protocol, size in bytes */
ssize_t
smpr_write_block
(
smpr_t
*
self
,
uint64_t
offs
,
size_t
size
,
uint32_t
*
data
,
uint32_t
flags
);
ssize_t
smpr_write_block
(
smpr_t
*
self
,
size_t
size_offs
,
uint64_t
offs
,
size_t
size
,
uint32_t
*
data
);
/* Read data block via DMA from protocol, size in bytes */
ssize_t
smpr_read_dma
(
smpr_t
*
self
,
uint64_t
offs
,
size_t
size
,
uint32_t
*
data
,
uint32_t
flags
);
ssize_t
smpr_read_dma
(
smpr_t
*
self
,
size_t
size_offs
,
uint64_t
offs
,
size_t
size
,
uint32_t
*
data
);
/* Write data block via DMA from protocol, size in bytes */
ssize_t
smpr_write_dma
(
smpr_t
*
self
,
uint64_t
offs
,
size_t
size
,
uint32_t
*
data
,
uint32_t
flags
);
ssize_t
smpr_write_dma
(
smpr_t
*
self
,
size_t
size_offs
,
uint64_t
offs
,
size_t
size
,
uint32_t
*
data
);
#ifdef __cplusplus
}
...
...
include/sm_pr_bsmp.h
View file @
acbe7be1
...
...
@@ -12,10 +12,7 @@
extern
"C"
{
#endif
/* For use by llio_t general structure */
extern
const
smpr_proto_ops_t
smpr_proto_ops_bsmp
;
/***************** SMPR proto BSMP methods ************************************/
/***************** SMPR proto BSMP methods **********************/
/* Read/Write to RFFE vars by ID */
smpr_err_e
smpr_bsmp_read_var_by_id
(
smpr_t
*
self
,
uint32_t
id
,
uint8_t
*
data
,
...
...
@@ -29,6 +26,16 @@ smpr_err_e smpr_bsmp_func_exec_by_id (smpr_t *self, uint32_t id, uint8_t *write_
smpr_err_e
smpr_bsmp_read_curve_by_id
(
smpr_t
*
self
,
uint32_t
id
,
uint8_t
*
read_data
,
size_t
size
,
size_t
*
valid_bytes
);
/************************* Our Methods **************************/
/* Creates a new instance of the proto_bsmp */
smpr_bsmp_t
*
smpr_bsmp_new
();
/* Destroy an instance of the bsmp */
smpr_err_e
smpr_bsmp_destroy
(
smpr_bsmp_t
**
self_p
);
/* Get BSMP operations */
const
smpr_proto_ops_t
*
smpr_bsmp_get_ops
(
smpr_bsmp_t
*
self
);
#ifdef __cplusplus
}
#endif
...
...
include/sm_pr_i2c.h
View file @
acbe7be1
...
...
@@ -24,8 +24,23 @@ typedef enum {
I2C_MODE_REP_START
,
/* Repetitive start mode */
}
i2c_mode_e
;
/* For use by llio_t general structure */
extern
const
smpr_proto_ops_t
smpr_proto_ops_i2c
;
/* Creates a new instance of the proto_i2c */
smpr_i2c_t
*
smpr_i2c_new
(
uint32_t
rep_start
,
uint32_t
addr
);
/* Destroy an instance of the i2c */
smpr_err_e
smpr_i2c_destroy
(
smpr_i2c_t
**
self_p
);
/* Set I2C rep_start parameter */
smpr_err_e
smpr_i2c_set_rep_start
(
smpr_i2c_t
*
self
,
uint32_t
rep_start
);
/* Get I2C rep_start parameter */
uint32_t
smpr_i2c_get_rep_start
(
smpr_i2c_t
*
self
);
/* Set I2C addr parameter */
smpr_err_e
smpr_i2c_set_addr
(
smpr_i2c_t
*
self
,
uint32_t
addr
);
/* Get I2C addr parameter */
uint32_t
smpr_i2c_get_addr
(
smpr_i2c_t
*
self
);
/* Get I2C operations */
const
smpr_proto_ops_t
*
smpr_i2c_get_ops
(
smpr_i2c_t
*
self
);
#ifdef __cplusplus
}
...
...
include/sm_pr_spi.h
View file @
acbe7be1
...
...
@@ -26,8 +26,25 @@ typedef enum {
SPI_MODE_WRITE_READ
}
spi_mode_e
;
/* For use by llio_t general structure */
extern
const
smpr_proto_ops_t
smpr_proto_ops_spi
;
/************************* Our Methods **************************/
/* Creates a new instance of the proto_spi */
smpr_spi_t
*
smpr_spi_new
(
uint32_t
ss
,
uint32_t
addr_msb
);
/* Destroy an instance of the spi */
smpr_err_e
smpr_spi_destroy
(
smpr_spi_t
**
self_p
);
/* Set SPI SS parameter */
smpr_err_e
smpr_spi_set_ss
(
smpr_spi_t
*
self
,
uint32_t
ss
);
/* Get SPI SS parameter */
uint32_t
smpr_spi_get_ss
(
smpr_spi_t
*
self
);
/* Get SPI addr_msb parameter */
smpr_err_e
smpr_spi_set_addr_msb
(
smpr_spi_t
*
self
,
uint32_t
addr_msb
);
/* Get SPI addr_msb parameter */
uint32_t
smpr_spi_get_addr_msb
(
smpr_spi_t
*
self
);
/* Get SPI operations */
const
smpr_proto_ops_t
*
smpr_spi_get_ops
(
smpr_spi_t
*
self
);
#ifdef __cplusplus
}
...
...
src/apps/ebpm/ebpm.c
View file @
acbe7be1
...
...
@@ -293,6 +293,7 @@ int main (int argc, char *argv[])
}
devio_err_e
err
=
DEVIO_SUCCESS
;
const
llio_ops_t
*
llio_ops
=
NULL
;
/* Check Dev_type */
switch
(
llio_type
)
{
case
ETH_DEV
:
...
...
@@ -312,6 +313,9 @@ int main (int argc, char *argv[])
ASSERT_TEST
(
err
==
DEVIO_SUCCESS
,
"Could not get dev_entry from config file"
,
err_exit
);
}
/* Get LLIO operations */
llio_ops
=
&
llio_ops_eth
;
break
;
case
PCIE_DEV
:
...
...
@@ -355,10 +359,13 @@ int main (int argc, char *argv[])
* on a larger system relying on systemd spawning, for instance */
ASSERT_TEST
(
fe_smio_id
==
0
,
"Invalid Dev_id for PCIE_DEV. Only "
"odd device IDs are available"
,
err_exit
,
0
);
llio_ops
=
&
llio_ops_pcie
;
break
;
default:
DBE_DEBUG
(
DBG_DEV_IO
|
DBG_LVL_INFO
,
"[ebpm] Invalid Dev_type. Exiting ...
\n
"
);
llio_ops
=
NULL
;
goto
err_exit
;
}
...
...
@@ -462,7 +469,7 @@ int main (int argc, char *argv[])
char
devio_service_str
[
DEVIO_SERVICE_LEN
];
snprintf
(
devio_service_str
,
DEVIO_SERVICE_LEN
-
1
,
"BPM%u:DEVIO"
,
dev_id
);
devio_service_str
[
DEVIO_SERVICE_LEN
-
1
]
=
'\0'
;
/* Just in case ... */
devio_t
*
devio
=
devio_new
(
devio_service_str
,
dev_id
,
dev_entry
,
llio_
type
,
devio_t
*
devio
=
devio_new
(
devio_service_str
,
dev_id
,
dev_entry
,
llio_
ops
,
broker_endp
,
verbose
,
devio_log_filename
);
ASSERT_ALLOC
(
devio
,
err_devio_alloc
);
...
...
src/dev_io/dev_io_core.c
View file @
acbe7be1
...
...
@@ -153,23 +153,23 @@ static devio_sig_handler_t devio_sigchld_handler =
/* Creates a new instance of Device Information */
devio_t
*
devio_new
(
char
*
name
,
uint32_t
id
,
char
*
endpoint_dev
,
llio_type_e
type
,
char
*
endpoint_broker
,
int
verbose
,
const
llio_ops_t
*
reg_ops
,
char
*
endpoint_broker
,
int
verbose
,
const
char
*
log_file_name
)
{
assert
(
name
);
assert
(
endpoint_dev
);
assert
(
reg_ops
);
assert
(
endpoint_broker
);
/* Set logfile available for all dev_mngr and dev_io instances.
* We accept NULL as a parameter, meaning to suppress all messages */
errhand_set_log
(
log_file_name
,
DEVIO_DFLT_LOG_MODE
);
char
*
dev_type_c
=
llio_type_to_str
(
type
);
DBE_DEBUG
(
DBG_DEV_IO
|
DBG_LVL_INFO
,
"[dev_io_core] Spawing DEVIO worker"
" with exported service %s, for a %s device
\n\t
located on %s,"
" broker address %s, with logfile on %s ...
\n
"
,
name
,
dev_type_c
,
" broker address %s, with logfile on %s ...
\n
"
,
name
,
(
reg_ops
->
name
==
NULL
)
?
"NULL"
:
reg_ops
->
name
,
endpoint_dev
,
endpoint_broker
,
(
log_file_name
==
NULL
)
?
"NULL"
:
log_file_name
);
free
(
dev_type_c
);
/* Print Software info */
DBE_DEBUG
(
DBG_DEV_IO
|
DBG_LVL_INFO
,
"[dev_io_core] BPM Device I/O version %s,"
...
...
@@ -253,7 +253,7 @@ devio_t * devio_new (char *name, uint32_t id, char *endpoint_dev,
ASSERT_ALLOC
(
llio_name
,
err_llio_name_alloc
);
strcat
(
llio_name
,
name
);
strcat
(
llio_name
,
LLIO_STR
);
self
->
llio
=
llio_new
(
llio_name
,
endpoint_dev
,
type
,
self
->
llio
=
llio_new
(
llio_name
,
endpoint_dev
,
reg_ops
,
verbose
);
ASSERT_ALLOC
(
self
->
llio
,
err_llio_alloc
);
...
...
@@ -281,7 +281,7 @@ devio_t * devio_new (char *name, uint32_t id, char *endpoint_dev,
/* Create SDB. If the device does not support SDB, this will fail.
* So, avoid creating SDB in this case, for now, as some unsupported
* endpoints do not have timeout implemented just yet */
if
(
llio_get_type
(
self
->
llio
)
==
PCIE_DEV
)
{
if
(
streq
(
llio_get_ops_name
(
self
->
llio
),
"PCIE"
)
)
{
err
=
sdbfs_dev_create
(
self
->
sdbfs
);
ASSERT_TEST
(
err
==
0
,
"Could not create SDBFS"
,
err_sdbfs_create
,
DEVIO_ERR_SMIO_DO_OP
);
...
...
@@ -323,7 +323,7 @@ err_disp_table_thsafe_ops_alloc:
err_sm_io_cfg_h_alloc:
zhashx_destroy
(
&
self
->
sm_io_h
);
err_sm_io_h_alloc:
if
(
llio_get_type
(
self
->
llio
)
==
PCIE_DEV
)
{
if
(
streq
(
llio_get_ops_name
(
self
->
llio
),
"PCIE"
)
)
{
sdbfs_dev_destroy
(
self
->
sdbfs
);
}
err_sdbfs_create:
...
...
@@ -474,7 +474,7 @@ devio_err_e devio_print_info (devio_t *self)
devio_err_e
err
=
DEVIO_SUCCESS
;
/* FIXME: Only valid for PCIe devices */
ASSERT_TEST
(
llio_get_type
(
self
->
llio
)
==
PCIE_DEV
,
ASSERT_TEST
(
streq
(
llio_get_ops_name
(
self
->
llio
),
"PCIE"
)
,
"SDB is only supported for PCIe devices"
,
err_sdb_not_supp
,
DEVIO_ERR_FUNC_NOT_IMPL
);
...
...
@@ -989,7 +989,7 @@ static devio_err_e _devio_register_all_sm_raw (devio_t *self)
uint32_t
smio_id
=
0
;
/* FIXME: Only valid for PCIe devices */
ASSERT_TEST
(
llio_get_type
(
self
->
llio
)
==
PCIE_DEV
,
ASSERT_TEST
(
streq
(
llio_get_ops_name
(
self
->
llio
),
"PCIE"
)
,
"SDB is only supported for PCIe devices"
,
err_sdb_not_supp
,
DEVIO_ERR_FUNC_NOT_IMPL
);
...
...
src/libs/libhutils/include/hutils_utils.h
View file @
acbe7be1
...
...
@@ -87,6 +87,13 @@ char *hutils_concat_strings_no_sep (const char *str1, const char* str2);
char
*
hutils_concat_strings3
(
const
char
*
str1
,
const
char
*
str2
,
const
char
*
str3
,
char
sep
);
/* Calculates necessary padding so that a given value is a multiple of a given
* alignment */
uint32_t
hutils_calculate_padding
(
uint32_t
value
,
uint32_t
alignment
);
/* Aligns a given value to a given alignment */
uint32_t
hutils_align_value
(
uint32_t
value
,
uint32_t
alignment
);
/* Spawns (fork and exec) a new process. Returns, for the parent process, -1
* in case of error and child's PID (> 0) if success. For the child process,
* returns -1 in case of error and 0 in case of success */
...
...
src/libs/libhutils/src/hutils_utils.c
View file @
acbe7be1
...
...
@@ -177,6 +177,24 @@ char *hutils_concat_strings3 (const char *str1, const char* str2,
return
_hutils_concat_strings_raw
(
str1
,
str2
,
str3
,
true
,
sep
);
}
/*******************************************************************/
/***************** Byte manipulation functions ********************/
/*******************************************************************/
uint32_t
hutils_calculate_padding
(
uint32_t
value
,
uint32_t
alignment
)
{
uint32_t
exceeded
=
value
%
alignment
;
uint32_t
remaining
=
alignment
-
exceeded
;
uint32_t
padding
=
remaining
%
alignment
;
return
padding
;
}
uint32_t
hutils_align_value
(
uint32_t
value
,
uint32_t
alignment
)
{
return
value
+
hutils_calculate_padding
(
value
,
alignment
);
}
/*******************************************************************/
/***************** System Fork/Exec functions *********************/
/*******************************************************************/
...
...
@@ -502,4 +520,3 @@ err_hash_item_alloc:
err_cfg_exit:
return
err
;
}
src/libs/libllio/include/ll_io_core.h
View file @
acbe7be1
...
...
@@ -36,6 +36,9 @@ typedef ssize_t (*write_dma_fp)(llio_t *self, uint64_t offs, size_t size, uint32
/* typedef int (*read_info_fp)(struct _llio_t *self, struct _llio_dev_info_t *dev_info); moved to dev_io */
typedef
struct
{
const
char
*
name
;
/* LLIO device name */
/* Operations */
open_fp
open
;
/* Open device */
release_fp
release
;
/* Release device */
read_16_fp
read_16
;
/* Read 16-bit data */
...
...
@@ -60,7 +63,7 @@ typedef struct {
/************************************************************/
/* Creates a new instance of the Low-level I/O */
llio_t
*
llio_new
(
char
*
name
,
char
*
endpoint
,
llio_type_e
type
,
int
verbose
);
llio_t
*
llio_new
(
char
*
name
,
char
*
endpoint
,
const
llio_ops_t
*
reg_ops
,
int
verbose
);
/* Destroy an instance of the Low-level I/O */
llio_err_e
llio_destroy
(
llio_t
**
self_p
);
...
...
@@ -83,7 +86,7 @@ llio_err_e llio_set_dev_handler (llio_t *self, void *dev_handler);
/* Get dev handler */
void
*
llio_get_dev_handler
(
llio_t
*
self
);
/* Get type */
llio_type_e
llio_get_typ
e
(
llio_t
*
self
);
const
char
*
llio_get_ops_nam
e
(
llio_t
*
self
);
/* Set SDB prefix ADDR */
llio_err_e
llio_set_sdb_prefix_addr
(
llio_t
*
self
,
uint64_t
sdb_prefix_addr
);
/* Get SDB prefix ADDR */
...
...
src/libs/libllio/src/ll_io_core.c
View file @
acbe7be1
...
...
@@ -32,32 +32,29 @@
/* LLIO class object */
struct
_llio_t
{
llio_type_e
type
;
/* Device type (PCIe, Ethnernet, or other) */
void
*
dev_handler
;
/* Generic pointer to a device handler. This
must be cast to a specific type by the
devices functions */
char
*
name
;
/* Identification of this llio instance */
int
verbose
;
/* Print activity to stdout */
uint64_t
sdb_prefix_addr
;
/* SDB prefix address. Used to read/write to the
uint64_t
sdb_prefix_addr
;
/* SDB prefix address. Used to read/write to the
SDB address space. To be set by the specific ops */
/* Endpoint to connect to */
llio_endpoint_t
*
endpoint
;
/* SDB device info */
/* struct _llio_dev_info_t *dev_info; Moved to dev_io */
/* Device operations */
const
llio_ops_t
*
ops
;
};
/* Register Low-level operations to llio instance. Helpper function */
static
llio_err_e
_llio_register_ops
(
llio_type_e
type
,
const
llio_ops_t
**
llio
_ops
);
static
llio_err_e
_llio_register_ops
(
const
llio_ops_t
**
ops
,
const
llio_ops_t
*
reg
_ops
);
/* Unregister Low-level operations to llio instance. Helpper function */
static
llio_err_e
_llio_unregister_ops
(
const
llio_ops_t
**
ops
);
/* Get open endpoint status */
static
bool
_llio_get_endpoint_open
(
llio_t
*
self
);
/* Creates a new instance of the Low-level I/O */
llio_t
*
llio_new
(
char
*
name
,
char
*
endpoint
,
llio_type_e
type
,
int
verbose
)
llio_t
*
llio_new
(
char
*
name
,
char
*
endpoint
,
const
llio_ops_t
*
reg_ops
,
int
verbose
)
{
assert
(
name
);
assert
(
endpoint
);
...
...
@@ -66,7 +63,6 @@ llio_t * llio_new (char *name, char *endpoint, llio_type_e type, int verbose)
ASSERT_ALLOC
(
self
,
err_self_alloc
);
/* Initialize Low-level IO type */
self
->
type
=
type
;
self
->
dev_handler
=
NULL
;
/* This is set by the device functions */
self
->
name
=
strdup
(
name
);
ASSERT_ALLOC
(
self
->
name
,
err_name_alloc
);
...
...
@@ -86,12 +82,9 @@ llio_t * llio_new (char *name, char *endpoint, llio_type_e type, int verbose)
ASSERT_ALLOC(self->dev_info, err_dev_info_alloc); Moved to dev_io */
/* Initilialize llio_ops */
/* self->ops = (llio_ops_t *) zmalloc (sizeof *self->ops); */
/* ASSERT_ALLOC(self->ops, err_ops_alloc); */
/* Nullify every ops field to indicate a non-implemented function */
/* *self->ops = (const llio_ops_t) {0}; */
self
->
ops
=
NULL
;
/* Attach Low-level operation to instance of llio */
_llio_register_ops
(
type
,
&
self
->
ops
);
_llio_register_ops
(
&
self
->
ops
,
reg_
ops
);
DBE_DEBUG
(
DBG_LL_IO
|
DBG_LVL_INFO
,
"[ll_io] Created instance of llio
\n
"
);
return
self
;
...
...
@@ -193,9 +186,14 @@ void *llio_get_dev_handler (llio_t *self)
return
self
->
dev_handler
;
}
llio_type_e
llio_get_typ
e
(
llio_t
*
self
)
const
char
*
llio_get_ops_nam
e
(
llio_t
*
self
)
{
return
self
->
type
;
assert
(
self
);
if
(
self
->
ops
==
NULL
)
{
return
NULL
;
}
return
self
->
ops
->
name
;
}
llio_err_e
llio_set_sdb_prefix_addr
(
llio_t
*
self
,
uint64_t
sdb_prefix_addr
)
...
...
@@ -221,26 +219,9 @@ static bool _llio_get_endpoint_open (llio_t *self)
/**************** Helper Functions ***************/
/* Register Low-level operations to llio instance. Helpper function */
static
llio_err_e
_llio_register_ops
(
llio_type_e
type
,
const
llio_ops_t
**
ops
)
static
llio_err_e
_llio_register_ops
(
const
llio_ops_t
**
ops
,
const
llio_ops_t
*
reg_
ops
)
{
switch
(
type
)
{
case
GENERIC_DEV
:
*
ops
=
NULL
;
return
LLIO_ERR_INV_FUNC_PARAM
;
case
PCIE_DEV
:
*
ops
=
&
llio_ops_pcie
;
break
;
case
ETH_DEV
:
*
ops
=
&
llio_ops_eth
;
break
;
default:
*
ops
=
NULL
;
return
LLIO_ERR_INV_FUNC_PARAM
;
}
*
ops
=
reg_ops
;
DBE_DEBUG
(
DBG_LL_IO
|
DBG_LVL_INFO
,
"[ll_io] Ops set
\n
"
);
return
LLIO_SUCCESS
;
}
...
...
src/libs/libllio/src/ops/ll_io_eth.c
View file @
acbe7be1
...
...
@@ -475,6 +475,7 @@ static ssize_t _eth_recvall (int fd, uint8_t *buf, size_t len)
}
const
llio_ops_t
llio_ops_eth
=
{
.
name
=
"ETH"
,
/* Operations name */
.
open
=
eth_open
,
/* Open device */
.
release
=
eth_release
,
/* Release device */
.
read_16
=
eth_read_16
,
/* Read 16-bit data */
...
...
src/libs/libllio/src/ops/ll_io_pcie.c
View file @
acbe7be1
...
...
@@ -188,7 +188,7 @@ static int pcie_open (llio_t *self, llio_endpoint_t *endpoint)
DBE_DEBUG
(
DBG_LL_IO
|
DBG_LVL_INFO
,
"[ll_io_pcie] Opened PCIe device located at %s
\n
"
,
llio_get_endpoint_name
(
self
));
/* Set SDB prefix adress */
llio_set_sdb_prefix_addr
(
self
,
BAR4_ADDR
);
...
...
@@ -653,6 +653,7 @@ static ssize_t _pcie_reset_fpga (llio_t *self)
}
const
llio_ops_t
llio_ops_pcie
=
{
.
name
=
"PCIE"
,
/* Operations name */
.
open
=
pcie_open
,
/* Open device */
.
release
=
pcie_release
,
/* Release device */
.
read_16
=
NULL
,
/* Read 16-bit data */
...
...
src/sm_io/chips/sm_ch_24aa64.c
View file @
acbe7be1
...
...
@@ -37,14 +37,13 @@
smch_err_str (err_type))
#define SMCH_24AA64_WAIT_TRIES 10
#define SMCH_24AA64_NAME "
I2C_
24AA64"
#define SMCH_24AA64_NAME "24AA64"
#define SMCH_24AA64_USECS_WAIT 10000
#define SMCH_24AA64_WAIT(usecs) usleep(usecs)
#define SMCH_24AA64_WAIT_DFLT SMCH_24AA64_WAIT(SMCH_24AA64_USECS_WAIT)
struct
_smch_24aa64_t
{
smpr_t
*
i2c
;
/* I2C protocol object */
uint32_t
addr
;
/* I2C address for this 24AA64 chip */
smpr_t
*
proto
;
/* PROTO protocol object */
};
static
ssize_t
_smch_24aa64_write_generic
(
smch_24aa64_t
*
self
,
uint16_t
addr
,
...
...
@@ -53,8 +52,8 @@ static ssize_t _smch_24aa64_read_generic (smch_24aa64_t *self, uint16_t addr,
uint8_t
*
data
,
size_t
size
);
/* Creates a new instance of the SMCH 24AA64 */
smch_24aa64_t
*
smch_24aa64_new
(
smio_t
*
parent
,
uint64_t
base
,
uint32_t
addr
,
int
verbose
)
smch_24aa64_t
*
smch_24aa64_new
(
smio_t
*
parent
,
uint64_t
base
,
const
smpr_proto_ops_t
*
reg_ops
,
int
verbose
)
{
(
void
)
verbose
;
assert
(
parent
);
...
...
@@ -62,21 +61,19 @@ smch_24aa64_t * smch_24aa64_new (smio_t *parent, uint64_t base, uint32_t addr,
smch_24aa64_t
*
self
=
(
smch_24aa64_t
*
)
zmalloc
(
sizeof
*
self
);
ASSERT_ALLOC
(
self
,
err_self_alloc
);
self
->
i2c
=
smpr_new
(
SMCH_24AA64_NAME
,
parent
,
SMPR_I2C
,
verbose
);
ASSERT_ALLOC
(
self
->
i2c
,
err_i2c
_alloc
);
self
->
proto
=
smpr_new
(
SMCH_24AA64_NAME
,
parent
,
reg_ops
,
verbose
);
ASSERT_ALLOC
(
self
->
proto
,
err_proto
_alloc
);
/* Initalize the
I2C
protocol */
int
smpr_err
=
smpr_open
(
self
->
i2c
,
base
,
NULL
/* Default parameters are fine */
);
/* Initalize the
PROTO
protocol */
int
smpr_err
=
smpr_open
(
self
->
proto
,
base
,
NULL
/* Default parameters are fine */
);
ASSERT_TEST
(
smpr_err
==
0
,
"Could not initialize SMPR protocol"
,
err_smpr_init
);
self
->
addr
=
addr
;
DBE_DEBUG
(
DBG_SM_CH
|
DBG_LVL_INFO
,
"[sm_ch:24aa64] Created instance of SMCH
\n
"
);
return
self
;
err_smpr_init:
smpr_destroy
(
&
self
->
i2c
);
err_
i2c
_alloc:
smpr_destroy
(
&
self
->
proto
);
err_
proto
_alloc:
free
(
self
);
err_self_alloc:
return
NULL
;
...
...
@@ -90,8 +87,8 @@ smch_err_e smch_24aa64_destroy (smch_24aa64_t **self_p)
if
(
*
self_p
)
{
smch_24aa64_t
*
self
=
*
self_p
;
smpr_release
(
self
->
i2c
);
smpr_destroy
(
&
self
->
i2c
);
smpr_release
(
self
->
proto
);
smpr_destroy
(
&
self
->
proto
);
free
(
self
);
*
self_p
=
NULL
;
}
...
...
@@ -144,10 +141,6 @@ static ssize_t _smch_24aa64_write_generic (smch_24aa64_t *self, uint16_t addr,
* Source: 24AA64/24LC64 DS21189F datasheet, page 8
*/
uint32_t
trans_size
=
E24AA64_ADDR_TRANS_SIZE
+
size
*
E24AA64_DATA_TRANS_SIZE
;
uint32_t
flags
=
SMPR_PROTO_I2C_TRANS_SIZE_FLAGS_W
(
trans_size
)
/* in bits */
|
SMPR_PROTO_I2C_ADDR_FLAGS_W
(
self
->
addr
);
/* 24AA64 write byte transaction is:
*
* Address high byte | Address low byte | Data0 | Data1 ...
...
...
@@ -156,22 +149,15 @@ static ssize_t _smch_24aa64_write_generic (smch_24aa64_t *self, uint16_t addr,
DBE_DEBUG
(
DBG_SM_CH
|
DBG_LVL_TRACE
,
"[sm_ch:24aa64_write_generic] data = 0x%02X
\n
"
,
*
data
);
DBE_DEBUG
(
DBG_SM_CH
|
DBG_LVL_TRACE
,
"[sm_ch:24aa64_write_generic] addr = 0x%04X
\n
"
,
addr
);
/* FIXME? Reduce memcpy calls? We just need this because the address must
* come in the LSBs of data */
uint8_t
__data
[
E24AA64_PAGE_TRANS_SIZE_MAX
/
SMPR_BYTE_2_BIT
];
uint16_t
__addr
=
E24AA64_ADDR_W
(
addr
);
memcpy
((
uint8_t
*
)
&
__data
,
&
__addr
,
E24AA64_ADDR_TRANS_SIZE
/
SMPR_BYTE_2_BIT
);
memcpy
((
uint8_t
*
)
&
__data
+
E24AA64_ADDR_TRANS_SIZE
/
SMPR_BYTE_2_BIT
,
data
,
size
);
ssize_t
smpr_err
=
smpr_write_block
(
self
->
i2c
,
0
,
ARRAY_SIZE
(
__data
),
(
uint32_t
*
)
&
__data
,
flags
);
ssize_t
smpr_err
=
smpr_write_block
(
self
->
proto
,
E24AA64_ADDR_SIZE
/
SMPR_BYTE_2_BIT
,
E24AA64_ADDR_W
(
addr
),
size
,
(
uint32_t
*
)
&
data
);
/* Check if we have written everything */
ASSERT_TEST
(
smpr_err
>=
0
&&
(
size_t
)
smpr_err
==
trans_size
/
SMPR_BYTE_2_BIT
/* in bytes */
,
ASSERT_TEST
(
smpr_err
>=
0
&&
(
size_t
)
smpr_err
==
size
/* in bytes */
,
"Could not write to SMPR"
,
err_smpr_write
,
-
1
);
/* Return
just
the number of data bytes written */
err
=
smpr_err
-
E24AA64_ADDR_TRANS_SIZE
/
SMPR_BYTE_2_BIT
;
/* Return the number of data bytes written */
err
=
smpr_err
;
/* 24AA64 takes up to 2 ms to write the page */
SMCH_24AA64_WAIT_DFLT
;
...
...
@@ -191,66 +177,23 @@ static ssize_t _smch_24aa64_read_generic (smch_24aa64_t *self, uint16_t addr,
* Source: 24AA64/24LC64 DS21189F datasheet, page 10-11
*/
uint32_t
trans_size
=
E24AA64_ADDR_TRANS_SIZE
;
uint32_t
flags
=
SMPR_PROTO_I2C_TRANS_SIZE_FLAGS_W
(
trans_size
)
/* in bits */
|
SMPR_PROTO_I2C_ADDR_FLAGS_W
(
self
->
addr
);
/* 24AA64 byte read transaction is:
*
* Address high byte | Address low byte
* 8-bit | 8-bit
* */
DBE_DEBUG
(
DBG_SM_CH
|
DBG_LVL_TRACE
,
"[sm_ch:24aa64_read_generic] addr = 0x%04X
\n
"
,
addr
);
uint32_t
__data
=
E24AA64_ADDR_W
(
addr
);
DBE_DEBUG
(
DBG_SM_CH
|
DBG_LVL_TRACE
,
"[sm_ch:24aa64_read_generic] addr = 0x%04X
\n
"
,
addr
);
ssize_t
smpr_err
=
smpr_write_32
(
self
->
i2c
,
0
,
&
__data
,
flags
);
err
=
smpr_read_block
(
self
->
proto
,
E24AA64_ADDR_SIZE
/
SMPR_BYTE_2_BIT
,
E24AA64_ADDR_W
(
addr
),
size
,
(
uint32_t
*
)
data
);
/* Check if we have written everything */
ASSERT_TEST
(
smpr_err
>=
0
&&
(
size_t
)
smpr_err
==
trans_size
/
SMPR_BYTE_2_BIT
/* in bytes */
,
"Could not write to SMPR"
,
err_smpr_write
,
-
1
);
/* Now, read the data */
trans_size
=
size
*
E24AA64_DATA_TRANS_SIZE
;
flags
=
SMPR_PROTO_I2C_TRANS_SIZE_FLAGS_W
(
trans_size
)
/* in bits */
|
SMPR_PROTO_I2C_ADDR_FLAGS_W
(
self
->
addr
);
smpr_err
=
smpr_read_block
(
self
->
i2c
,
0
,
size
,
(
uint32_t
*
)
data
,
flags
);
/* Check if we have written everything */
ASSERT_TEST
(
smpr_err
>=
0
&&
(
size_t
)
smpr_err
==
trans_size
/
SMPR_BYTE_2_BIT
/* in bytes */
,
"Could not READ from SMPR"
,
err_smpr_read
,
-
1
);
err
=
smpr_err
;
ASSERT_TEST
(
err
>=
0
&&
(
size_t
)
err
==
size
/* in bytes */
,
"Could not read from SMPR"
,
err_smpr_read
,
-
1
);
/* 24AA64 takes up to 2 ms to write the page */
SMCH_24AA64_WAIT_DFLT
;
err_smpr_read:
err_smpr_write:
return
err
;
}
ssize_t
smch_24aa64_probe_bus
(
smch_24aa64_t
*
self
)
{
ssize_t
err
=
0
;
DBE_DEBUG
(
DBG_SM_CH
|
DBG_LVL_TRACE
,
"[sm_ch:24aa64_probe_bus] Probing bus ...
\n
"
);
uint32_t
i
;
for
(
i
=
0
;
i
<
128
;
++
i
)
{
uint32_t
flags
=
SMPR_PROTO_I2C_TRANS_SIZE_FLAGS_W
(
8
)
/* in bits */
|
SMPR_PROTO_I2C_ADDR_FLAGS_W
(
i
);
uint32_t
__data
=
0
;
ssize_t
smpr_err
=
smpr_read_32
(
self
->
i2c
,
0
,
&
__data
,
flags
);
if
(
smpr_err
>=
0
)
{
DBE_DEBUG
(
DBG_SM_CH
|
DBG_LVL_INFO
,
"[sm_ch:24aa64_probe_bus] "
"Found device at address 0x%02X
\n
"
,
i
);
}
SMCH_24AA64_WAIT_DFLT
;
}
return
err
;
}
src/sm_io/chips/sm_ch_ad9510.c
View file @
acbe7be1
...
...
@@ -44,7 +44,6 @@
struct
_smch_ad9510_t
{
smpr_t
*
spi
;
/* SPI protocol object */
uint32_t
ss
;
/* Slave select line for this AD9510 chip */
};
static
ssize_t
_smch_ad9510_write_8
(
smch_ad9510_t
*
self
,
uint8_t
addr
,
...
...
@@ -56,8 +55,8 @@ static bool _smch_ad9510_wait_completion (smch_ad9510_t *self, unsigned int trie
static
smch_err_e
_smch_ad9510_reg_update
(
smch_ad9510_t
*
self
);
/* Creates a new instance of the SMCH AD9510 */
smch_ad9510_t
*
smch_ad9510_new
(
smio_t
*
parent
,
uint64_t
base
,
uint32_t
ss
,
int
verbose
)
smch_ad9510_t
*
smch_ad9510_new
(
smio_t
*
parent
,
uint64_t
base
,
const
smpr_proto_ops_t
*
reg_ops
,
int
verbose
)
{
(
void
)
verbose
;
assert
(
parent
);
...
...
@@ -65,15 +64,13 @@ smch_ad9510_t * smch_ad9510_new (smio_t *parent, uint64_t base, uint32_t ss,
smch_ad9510_t
*
self
=
(
smch_ad9510_t
*
)
zmalloc
(
sizeof
*
self
);
ASSERT_ALLOC
(
self
,
err_self_alloc
);
self
->
spi
=
smpr_new
(
SMCH_AD9510_NAME
,
parent
,
SMPR_SPI
,
verbose
);
self
->
spi
=
smpr_new
(
SMCH_AD9510_NAME
,
parent
,
reg_ops
,
verbose
);
ASSERT_ALLOC
(
self
->
spi
,
err_spi_alloc
);
/* Initalize the SPI protocol */
int
smpr_err
=
smpr_open
(
self
->
spi
,
base
,
NULL
/* Default parameters are fine */
);
ASSERT_TEST
(
smpr_err
==
0
,
"Could not initialize SMPR protocol"
,
err_smpr_init
);
self
->
ss
=
ss
;
DBE_DEBUG
(
DBG_SM_CH
|
DBG_LVL_INFO
,
"[sm_ch:ad9510] Created instance of SMCH
\n
"
);
smch_err_e
err
=
_smch_ad9510_init
(
self
);
...
...
@@ -735,7 +732,7 @@ static smch_err_e _smch_ad9510_init (smch_ad9510_t *self)
err_smpr_write
,
SMCH_ERR_RW_SMPR
);
/* According to AD9510 datasheet Rev. B, page 46, table 25, regester 0x00 (CFG_SERIAL),
* does not need to be updated by setting the "update registers" bit. We still wait our default
* does not need to be updated by setting the "update registers" bit. We still wait our default
* ammount of time to be sure the chip is indeed reset */
SMCH_AD9510_WAIT_DFLT
;
...
...
@@ -746,7 +743,7 @@ static smch_err_e _smch_ad9510_init (smch_ad9510_t *self)
err_smpr_write
,
SMCH_ERR_RW_SMPR
);
/* According to AD9510 datasheet Rev. B, page 46, table 25, regester 0x00 (CFG_SERIAL),
* does not need to be updated by setting the "update registers" bit. We still wait our default
* does not need to be updated by setting the "update registers" bit. We still wait our default
* ammount of time to be sure the chip is indeed reset */
/* Wait for reset to complete */
...
...
@@ -770,16 +767,18 @@ static ssize_t _smch_ad9510_write_8 (smch_ad9510_t *self, uint8_t addr,
/* We transmit a WRITE operation, with 1 byte transfer, with address as "addr"
* and data as "data" */
uint
32_t
__data
=
~
AD9510_HDR_RW
&
(
uint
64_t
__addr
=
~
AD9510_HDR_RW
&
(
AD9510_HDR_BT_W
(
0x0
)
|
AD9510_HDR_ADDR_W
(
addr
)
|
AD9510_DATA_W
(
*
data
)
AD9510_HDR_ADDR_W
(
addr
)
);
uint32_t
flags
=
SMPR_PROTO_SPI_SS_FLAGS_W
(
self
->
ss
)
|
SMPR_PROTO_SPI_CHARLEN_FLAGS_W
(
AD9510_TRASNS_SIZE
);
ssize_t
smpr_err
=
smpr_write_32
(
self
->
spi
,
0
,
&
__data
,
flags
);
ASSERT_TEST
(
smpr_err
==
sizeof
(
uint32_t
),
"Could not write to SMPR"
,
err_smpr_write
,
-
1
);
size_t
__addr_size
=
AD9510_INSTADDR_SIZE
/
SMPR_BYTE_2_BIT
;
uint32_t
__data
=
AD9510_DATA_W
(
*
data
);
size_t
__data_size
=
AD9510_DATA_SIZE
/
SMPR_BYTE_2_BIT
;
ssize_t
smpr_err
=
smpr_write_block
(
self
->
spi
,
__addr_size
,
__addr
,
__data_size
,
&
__data
);
ASSERT_TEST
(
smpr_err
>
0
&&
(
size_t
)
smpr_err
==
__data_size
,
"Could not write to SMPR"
,
err_smpr_write
,
-
1
);
err_smpr_write:
return
err
;
...
...
@@ -798,20 +797,19 @@ static ssize_t _smch_ad9510_read_8 (smch_ad9510_t *self, uint8_t addr,
* */
/* We transmit a READ operation, with 1 byte transfer, with address as "addr" */
uint
32_t
__data
=
AD9510_HDR_RW
|
(
uint
64_t
__addr
=
AD9510_HDR_RW
|
(
AD9510_HDR_BT_W
(
0x0
)
|
AD9510_HDR_ADDR_W
(
addr
)
);
uint32_t
flags
=
SMPR_PROTO_SPI_SS_FLAGS_W
(
self
->
ss
)
|
SMPR_PROTO_SPI_CHARLEN_FLAGS_W
(
AD9510_TRASNS_SIZE
);
ssize_t
smpr_err
=
smpr_read_32
(
self
->
spi
,
0
,
&
__data
,
flags
);
ASSERT_TEST
(
smpr_err
==
sizeof
(
uint32_t
),
"Could not write to SMPR"
,
err_smpr_write
,
-
1
);
size_t
__addr_size
=
AD9510_INSTADDR_SIZE
/
SMPR_BYTE_2_BIT
;
size_t
__data_size
=
AD9510_DATA_SIZE
/
SMPR_BYTE_2_BIT
;
/* Only the 8 LSB are valid for one byte reading (AD9510_HDR_BT_W(0x0)) */
memcpy
(
data
,
&
__data
,
sizeof
(
uint8_t
));
ssize_t
smpr_err
=
smpr_read_block
(
self
->
spi
,
__addr_size
,
__addr
,
__data_size
,
(
uint32_t
*
)
data
);
ASSERT_TEST
(
smpr_err
>
0
&&
(
size_t
)
smpr_err
==
__data_size
,
"Could not read to SMPR"
,
err_read_write
,
-
1
);
err_
smpr
_write:
err_
read
_write:
return
err
;
}
...
...
src/sm_io/chips/sm_ch_isla216p.c
View file @
acbe7be1
...
...
@@ -31,14 +31,13 @@
smch_err_str (err_type))
#define SMCH_ISLA216P_WAIT_TRIES 10
#define SMCH_ISLA216P_NAME "
SPI_
ISLA216P"
#define SMCH_ISLA216P_NAME "ISLA216P"
#define SMCH_ISLA216P_USECS_WAIT 1000
#define SMCH_ISLA216P_WAIT(usecs) usleep(usecs)
#define SMCH_ISLA216P_WAIT_DFLT SMCH_ISLA216P_WAIT(SMCH_ISLA216P_USECS_WAIT)
struct
_smch_isla216p_t
{
smpr_t
*
spi
;
/* SPI protocol object */
uint32_t
ss
;
/* Slave select line for this ISLA216P chip */
smpr_t
*
proto
;
/* PROTO protocol object */
};
static
smch_err_e
_smch_isla216p_init
(
smch_isla216p_t
*
self
);
...
...
@@ -49,8 +48,8 @@ static ssize_t _smch_isla216p_read_8 (smch_isla216p_t *self, uint8_t addr,
uint8_t
*
data
);
/* Creates a new instance of the SMCH ISLA216P */
smch_isla216p_t
*
smch_isla216p_new
(
smio_t
*
parent
,
uint64_t
base
,
uint32_t
ss
,
int
verbose
)
smch_isla216p_t
*
smch_isla216p_new
(
smio_t
*
parent
,
uint64_t
base
,
const
smpr_proto_ops_t
*
reg_ops
,
int
verbose
)
{
(
void
)
verbose
;
assert
(
parent
);
...
...
@@ -58,13 +57,12 @@ smch_isla216p_t * smch_isla216p_new (smio_t *parent, uint64_t base, uint32_t ss,
smch_isla216p_t
*
self
=
(
smch_isla216p_t
*
)
zmalloc
(
sizeof
*
self
);
ASSERT_ALLOC
(
self
,
err_self_alloc
);
self
->
spi
=
smpr_new
(
SMCH_ISLA216P_NAME
,
parent
,
SMPR_SPI
,
verbose
);
ASSERT_ALLOC
(
self
->
spi
,
err_spi
_alloc
);
self
->
proto
=
smpr_new
(
SMCH_ISLA216P_NAME
,
parent
,
reg_ops
,
verbose
);
ASSERT_ALLOC
(
self
->
proto
,
err_proto
_alloc
);
/* Initalize the
SPI
protocol */
int
smpr_err
=
smpr_open
(
self
->
spi
,
base
,
NULL
/* Default parameters are fine */
);
/* Initalize the
PROTO
protocol */
int
smpr_err
=
smpr_open
(
self
->
proto
,
base
,
NULL
/* Default parameters are fine */
);
ASSERT_TEST
(
smpr_err
==
0
,
"Could not initialize SMPR protocol"
,
err_smpr_init
);
self
->
ss
=
ss
;
DBE_DEBUG
(
DBG_SM_CH
|
DBG_LVL_INFO
,
"[sm_ch:isla216p] Created instance of SMCH
\n
"
);
...
...
@@ -74,10 +72,10 @@ smch_isla216p_t * smch_isla216p_new (smio_t *parent, uint64_t base, uint32_t ss,
return
self
;
err_smch_init:
smpr_release
(
self
->
spi
);
smpr_release
(
self
->
proto
);
err_smpr_init:
smpr_destroy
(
&
self
->
spi
);
err_
spi
_alloc:
smpr_destroy
(
&
self
->
proto
);
err_
proto
_alloc:
free
(
self
);
err_self_alloc:
return
NULL
;
...
...
@@ -91,8 +89,8 @@ smch_err_e smch_isla216p_destroy (smch_isla216p_t **self_p)
if
(
*
self_p
)
{
smch_isla216p_t
*
self
=
*
self_p
;
smpr_release
(
self
->
spi
);
smpr_destroy
(
&
self
->
spi
);
smpr_release
(
self
->
proto
);
smpr_destroy
(
&
self
->
proto
);
free
(
self
);
*
self_p
=
NULL
;
}
...
...
@@ -173,7 +171,7 @@ static smch_err_e _smch_isla216p_init (smch_isla216p_t *self)
smch_err_e
err
=
SMCH_SUCCESS
;
ssize_t
rw_err
=
-
1
;
/* Turn on Bidirectional
SPI
*/
/* Turn on Bidirectional
PROTO
*/
uint8_t
data
=
ISLA216P_PORTCONFIG_SDO_ACTIVE
;
DBE_DEBUG
(
DBG_SM_CH
|
DBG_LVL_INFO
,
"[sm_ch:isla216p] Writing 0x%02X to addr 0x%02X
\n
"
,
data
,
ISLA216P_REG_PORTCONFIG
);
...
...
@@ -199,7 +197,7 @@ static smch_err_e _smch_isla216p_init (smch_isla216p_t *self)
err_smpr_write, SMCH_ERR_RW_SMPR);
#endif
data
=
ISLA216P_NAPSLP_W
(
ISLA216P_NAPSLP_NORMAL_OPERATION
);
data
=
ISLA216P_NAPSLP_W
(
ISLA216P_NAPSLP_NORMAL_OPERATION
);
rw_err
=
_smch_isla216p_write_8
(
self
,
ISLA216P_REG_NAPSLP
,
&
data
);
ASSERT_TEST
(
rw_err
==
sizeof
(
uint8_t
),
"Could not write to ISLA216P_REG_NAPSLP"
,
err_smpr_write
,
SMCH_ERR_RW_SMPR
);
...
...
@@ -224,16 +222,18 @@ static ssize_t _smch_isla216p_write_8 (smch_isla216p_t *self, uint8_t addr,
/* We transmit a WRITE operation, with 1 byte transfer, with address as "addr"
* and data as "data" */
uint32_t
__
data
=
~
ISLA216P_HDR_RW
&
(
uint32_t
__
addr
=
~
ISLA216P_HDR_RW
&
(
ISLA216P_HDR_BT_W
(
0x0
)
|
ISLA216P_HDR_ADDR_W
(
addr
)
|
ISLA216P_DATA_W
(
*
data
)
ISLA216P_HDR_ADDR_W
(
addr
)
);
uint32_t
flags
=
SMPR_PROTO_SPI_SS_FLAGS_W
(
self
->
ss
)
|
SMPR_PROTO_SPI_CHARLEN_FLAGS_W
(
ISLA216P_TRANS_SIZE
);
ssize_t
smpr_err
=
smpr_write_32
(
self
->
spi
,
0
,
&
__data
,
flags
);
ASSERT_TEST
(
smpr_err
==
sizeof
(
uint32_t
),
"Could not write to SMPR"
,
err_smpr_write
,
-
1
);
size_t
__addr_size
=
ISLA216P_INSTADDR_SIZE
/
SMPR_BYTE_2_BIT
;
uint32_t
__data
=
ISLA216P_DATA_W
(
*
data
);
size_t
__data_size
=
ISLA216P_DATA_SIZE
/
SMPR_BYTE_2_BIT
;
ssize_t
smpr_err
=
smpr_write_block
(
self
->
proto
,
__addr_size
,
__addr
,
__data_size
,
&
__data
);
ASSERT_TEST
(
smpr_err
>
0
&&
(
size_t
)
smpr_err
==
__data_size
,
"Could not write to SMPR"
,
err_smpr_write
,
-
1
);
err_smpr_write:
return
err
;
...
...
@@ -252,19 +252,18 @@ static ssize_t _smch_isla216p_read_8 (smch_isla216p_t *self, uint8_t addr,
* */
/* We transmit a READ operation, with 1 byte transfer, with address as "addr" */
uint32_t
__
data
=
ISLA216P_HDR_RW
|
(
uint32_t
__
addr
=
ISLA216P_HDR_RW
|
(
ISLA216P_HDR_BT_W
(
0x0
)
|
ISLA216P_HDR_ADDR_W
(
addr
)
);
uint32_t
flags
=
SMPR_PROTO_SPI_SS_FLAGS_W
(
self
->
ss
)
|
SMPR_PROTO_SPI_CHARLEN_FLAGS_W
(
ISLA216P_TRANS_SIZE
);
ssize_t
smpr_err
=
smpr_read_32
(
self
->
spi
,
0
,
&
__data
,
flags
);
ASSERT_TEST
(
smpr_err
==
sizeof
(
uint32_t
),
"Could not write to SMPR"
,
err_smpr_write
,
-
1
);
size_t
__addr_size
=
ISLA216P_INSTADDR_SIZE
/
SMPR_BYTE_2_BIT
;
size_t
__data_size
=
ISLA216P_DATA_SIZE
/
SMPR_BYTE_2_BIT
;
/* Only the 8 LSB are valid for one byte reading (ISLA216P_HDR_BT_W(0x0)) */
memcpy
(
data
,
&
__data
,
sizeof
(
uint8_t
));
ssize_t
smpr_err
=
smpr_read_block
(
self
->
proto
,
__addr_size
,
__addr
,
__data_size
,
(
uint32_t
*
)
data
);
ASSERT_TEST
(
smpr_err
>
0
&&
(
size_t
)
smpr_err
==
__data_size
,
"Could not read to SMPR"
,
err_smpr_read
,
-
1
);
err_smpr_
write
:
err_smpr_
read
:
return
err
;
}
src/sm_io/chips/sm_ch_pca9547.c
View file @
acbe7be1
...
...
@@ -4,7 +4,7 @@
*
* Released according to the GNU GPL, version 3 or any later version.
*
* Description: Software driver for
rPCA9547 I2C
switch chip
* Description: Software driver for
PCA9547
switch chip
*/
#include "bpm_server.h"
...
...
@@ -32,19 +32,18 @@
CHECK_HAL_ERR(err, SM_CH, "[sm_ch:pca9547]", \
smch_err_str (err_type))
#define SMCH_PCA9547_NAME "
I2C_
PCA9547"
#define SMCH_PCA9547_NAME "PCA9547"
struct
_smch_pca9547_t
{
smpr_t
*
i2c
;
/* I2C protocol object */
uint32_t
addr
;
/* I2C address for this PCA9547 chip */
smpr_t
*
proto
;
/* PROTO protocol object */
};
static
smch_err_e
_smch_pca9547_write_8
(
smch_pca9547_t
*
self
,
const
uint8_t
*
data
);
static
smch_err_e
_smch_pca9547_read_8
(
smch_pca9547_t
*
self
,
uint8_t
*
data
);
/* Creates a new instance of the SMCH PCA9547 */
smch_pca9547_t
*
smch_pca9547_new
(
smio_t
*
parent
,
uint64_t
base
,
uint32_t
addr
,
int
verbose
)
smch_pca9547_t
*
smch_pca9547_new
(
smio_t
*
parent
,
uint64_t
base
,
const
smpr_proto_ops_t
*
reg_ops
,
int
verbose
)
{
(
void
)
verbose
;
assert
(
parent
);
...
...
@@ -52,21 +51,19 @@ smch_pca9547_t * smch_pca9547_new (smio_t *parent, uint64_t base, uint32_t addr,
smch_pca9547_t
*
self
=
(
smch_pca9547_t
*
)
zmalloc
(
sizeof
*
self
);
ASSERT_ALLOC
(
self
,
err_self_alloc
);
self
->
i2c
=
smpr_new
(
SMCH_PCA9547_NAME
,
parent
,
SMPR_I2C
,
verbose
);
ASSERT_ALLOC
(
self
->
i2c
,
err_i2c
_alloc
);
self
->
proto
=
smpr_new
(
SMCH_PCA9547_NAME
,
parent
,
reg_ops
,
verbose
);
ASSERT_ALLOC
(
self
->
proto
,
err_proto
_alloc
);
/* Initalize the
I2C
protocol */
int
smpr_err
=
smpr_open
(
self
->
i2c
,
base
,
NULL
/* Default parameters are fine */
);
/* Initalize the
PROTO
protocol */
int
smpr_err
=
smpr_open
(
self
->
proto
,
base
,
NULL
/* Default parameters are fine */
);
ASSERT_TEST
(
smpr_err
==
0
,
"Could not initialize SMPR protocol"
,
err_smpr_init
);
self
->
addr
=
addr
;
DBE_DEBUG
(
DBG_SM_CH
|
DBG_LVL_INFO
,
"[sm_ch:pca9547] Created instance of SMCH
\n
"
);
return
self
;
err_smpr_init:
smpr_destroy
(
&
self
->
i2c
);
err_
i2c
_alloc:
smpr_destroy
(
&
self
->
proto
);
err_
proto
_alloc:
free
(
self
);
err_self_alloc:
return
NULL
;
...
...
@@ -80,8 +77,8 @@ smch_err_e smch_pca9547_destroy (smch_pca9547_t **self_p)
if
(
*
self_p
)
{
smch_pca9547_t
*
self
=
*
self_p
;
smpr_release
(
self
->
i2c
);
smpr_destroy
(
&
self
->
i2c
);
smpr_release
(
self
->
proto
);
smpr_destroy
(
&
self
->
proto
);
free
(
self
);
*
self_p
=
NULL
;
}
...
...
@@ -104,9 +101,6 @@ smch_err_e smch_pca9547_read_8 (smch_pca9547_t *self, uint8_t *data)
static
smch_err_e
_smch_pca9547_write_8
(
smch_pca9547_t
*
self
,
const
uint8_t
*
data
)
{
smch_err_e
err
=
SMCH_SUCCESS
;
uint32_t
trans_size
=
PCA9547_DATA_TRANS_SIZE
;
uint32_t
flags
=
SMPR_PROTO_I2C_TRANS_SIZE_FLAGS_W
(
trans_size
)
/* in bits */
|
SMPR_PROTO_I2C_ADDR_FLAGS_W
(
self
->
addr
);
/* PCA9547 write byte transaction is:
*
...
...
@@ -116,8 +110,8 @@ static smch_err_e _smch_pca9547_write_8 (smch_pca9547_t *self, const uint8_t *da
DBE_DEBUG
(
DBG_SM_CH
|
DBG_LVL_TRACE
,
"[sm_ch:pca9547_write_8] data = 0x%02X
\n
"
,
*
data
);
ssize_t
smpr_err
=
smpr_write_
32
(
self
->
i2c
,
0
,
(
uint32_t
*
)
data
,
flags
);
ASSERT_TEST
(
smpr_err
==
PCA9547_DATA_TRANS_SIZE
/
SMPR_BYTE_2_BIT
/* in bytes*/
,
ssize_t
smpr_err
=
smpr_write_
block
(
self
->
proto
,
0
,
0
,
sizeof
(
*
data
),
(
uint32_t
*
)
data
);
ASSERT_TEST
(
smpr_err
==
sizeof
(
*
data
)
/* in bytes*/
,
"Could not write data to I2C"
,
err_exit
,
SMCH_ERR_RW_SMPR
);
err_exit:
...
...
@@ -127,9 +121,6 @@ err_exit:
static
smch_err_e
_smch_pca9547_read_8
(
smch_pca9547_t
*
self
,
uint8_t
*
data
)
{
smch_err_e
err
=
SMCH_SUCCESS
;
uint32_t
trans_size
=
PCA9547_DATA_TRANS_SIZE
;
uint32_t
flags
=
SMPR_PROTO_I2C_TRANS_SIZE_FLAGS_W
(
trans_size
)
/* in bits */
|
SMPR_PROTO_I2C_ADDR_FLAGS_W
(
self
->
addr
);
/* PCA9547 read byte transaction is:
*
...
...
@@ -137,8 +128,8 @@ static smch_err_e _smch_pca9547_read_8 (smch_pca9547_t *self, uint8_t *data)
* 8-bit
* */
ssize_t
smpr_err
=
smpr_read_
32
(
self
->
i2c
,
0
,
(
uint32_t
*
)
data
,
flags
);
ASSERT_TEST
(
smpr_err
==
PCA9547_DATA_TRANS_SIZE
/
SMPR_BYTE_2_BIT
/* in bytes*/
,
ssize_t
smpr_err
=
smpr_read_
block
(
self
->
proto
,
0
,
0
,
sizeof
(
*
data
),
(
uint32_t
*
)
data
);
ASSERT_TEST
(
smpr_err
==
sizeof
(
*
data
)
/* in bytes*/
,
"Could not read data to I2C"
,
err_exit
,
SMCH_ERR_RW_SMPR
);
DBE_DEBUG
(
DBG_SM_CH
|
DBG_LVL_TRACE
,
"[sm_ch:pca9547_read_8] data = 0x%02X
\n
"
,
...
...
src/sm_io/chips/sm_ch_rffe.c
View file @
acbe7be1
...
...
@@ -36,17 +36,18 @@
CHECK_HAL_ERR(err, SM_CH, "[sm_ch:rffe]", \
smch_err_str (err_type))
#define SMCH_RFFE_NAME "
BSMP_
RFFE"
#define SMCH_RFFE_NAME "RFFE"
#define SMCH_RFFE_USECS_WAIT 10000
#define SMCH_RFFE_WAIT(usecs) usleep(usecs)
#define SMCH_RFFE_WAIT_DFLT SMCH_RFFE_WAIT(SMCH_RFFE_USECS_WAIT)
struct
_smch_rffe_t
{
smpr_t
*
bsmp
;
/* BSMP
protocol object */
smpr_t
*
proto
;
/* PROTO
protocol object */
};
/* Creates a new instance of the SMCH RFFE */
smch_rffe_t
*
smch_rffe_new
(
smio_t
*
parent
,
int
verbose
)
smch_rffe_t
*
smch_rffe_new
(
smio_t
*
parent
,
const
smpr_proto_ops_t
*
reg_ops
,
int
verbose
)
{
(
void
)
verbose
;
assert
(
parent
);
...
...
@@ -54,19 +55,19 @@ smch_rffe_t * smch_rffe_new (smio_t *parent, int verbose)
smch_rffe_t
*
self
=
(
smch_rffe_t
*
)
zmalloc
(
sizeof
*
self
);
ASSERT_ALLOC
(
self
,
err_self_alloc
);
self
->
bsmp
=
smpr_new
(
SMCH_RFFE_NAME
,
parent
,
SMPR_BSMP
,
verbose
);
ASSERT_ALLOC
(
self
->
bsmp
,
err_bsmp
_alloc
);
self
->
proto
=
smpr_new
(
SMCH_RFFE_NAME
,
parent
,
reg_ops
,
verbose
);
ASSERT_ALLOC
(
self
->
proto
,
err_proto
_alloc
);
/* Initalize the
BSMP
protocol */
int
smpr_err
=
smpr_open
(
self
->
bsmp
,
0
,
NULL
/* Default parameters are fine */
);
/* Initalize the
PROTO
protocol */
int
smpr_err
=
smpr_open
(
self
->
proto
,
0
,
NULL
/* Default parameters are fine */
);
ASSERT_TEST
(
smpr_err
==
0
,
"Could not initialize SMPR protocol"
,
err_smpr_init
);
DBE_DEBUG
(
DBG_SM_CH
|
DBG_LVL_INFO
,
"[sm_ch:rffe] Created instance of SMCH
\n
"
);
return
self
;
err_smpr_init:
smpr_destroy
(
&
self
->
bsmp
);
err_
bsmp
_alloc:
smpr_destroy
(
&
self
->
proto
);
err_
proto
_alloc:
free
(
self
);
err_self_alloc:
return
NULL
;
...
...
@@ -80,8 +81,8 @@ smch_err_e smch_rffe_destroy (smch_rffe_t **self_p)
if
(
*
self_p
)
{
smch_rffe_t
*
self
=
*
self_p
;
smpr_release
(
self
->
bsmp
);
smpr_destroy
(
&
self
->
bsmp
);
smpr_release
(
self
->
proto
);
smpr_destroy
(
&
self
->
proto
);
free
(
self
);
*
self_p
=
NULL
;
}
...
...
@@ -97,7 +98,7 @@ smch_err_e smch_rffe_write_var (smch_rffe_t *self, uint32_t id, uint8_t *data,
smch_err_e
err
=
SMCH_SUCCESS
;
smpr_err_e
smpr_err
=
smpr_bsmp_write_var_by_id
(
self
->
bsmp
,
id
,
data
,
size
);
smpr_err_e
smpr_err
=
smpr_bsmp_write_var_by_id
(
self
->
proto
,
id
,
data
,
size
);
ASSERT_TEST
(
smpr_err
==
SMPR_SUCCESS
,
"Could not write variable to SMPR"
,
err_smpr_write_var
,
SMCH_ERR_RW_SMPR
);
...
...
@@ -113,7 +114,7 @@ smch_err_e smch_rffe_read_var (smch_rffe_t *self, uint32_t id, uint8_t *data,
smch_err_e
err
=
SMCH_SUCCESS
;
smpr_err_e
smpr_err
=
smpr_bsmp_read_var_by_id
(
self
->
bsmp
,
id
,
data
,
size
);
smpr_err_e
smpr_err
=
smpr_bsmp_read_var_by_id
(
self
->
proto
,
id
,
data
,
size
);
ASSERT_TEST
(
smpr_err
==
SMPR_SUCCESS
,
"Could not read variable to SMPR"
,
err_smpr_read_var
,
SMCH_ERR_RW_SMPR
);
...
...
src/sm_io/chips/sm_ch_si57x.c
View file @
acbe7be1
...
...
@@ -37,14 +37,13 @@
smch_err_str (err_type))
#define SMCH_SI57X_WAIT_TRIES 10
#define SMCH_SI57X_NAME "
I2C_
SI57X"
#define SMCH_SI57X_NAME "SI57X"
#define SMCH_SI57X_USECS_WAIT 10000
#define SMCH_SI57X_WAIT(usecs) usleep(usecs)
#define SMCH_SI57X_WAIT_DFLT SMCH_SI57X_WAIT(SMCH_SI57X_USECS_WAIT)
struct
_smch_si57x_t
{
smpr_t
*
i2c
;
/* I2C protocol object */
uint32_t
addr
;
/* I2C address for this SI57X chip */
smpr_t
*
proto
;
/* PROTO protocol object */
double
fxtal
;
/* Internal crystal frequency */
unsigned
int
n1
;
/* N1 divider value */
unsigned
int
hs_div
;
/* High Speed divider value */
...
...
@@ -76,8 +75,8 @@ static smch_err_e _smch_si57x_calc_divs (smch_si57x_t *self, double frequency,
static
smch_err_e
_smch_si57x_wait_new_freq
(
smch_si57x_t
*
self
);
/* Creates a new instance of the SMCH SI57X */
smch_si57x_t
*
smch_si57x_new
(
smio_t
*
parent
,
uint64_t
base
,
uint32_t
addr
,
int
verbose
)
smch_si57x_t
*
smch_si57x_new
(
smio_t
*
parent
,
uint64_t
base
,
const
smpr_proto_ops_t
*
reg_ops
,
int
verbose
)
{
(
void
)
verbose
;
assert
(
parent
);
...
...
@@ -85,15 +84,13 @@ smch_si57x_t * smch_si57x_new (smio_t *parent, uint64_t base, uint32_t addr,
smch_si57x_t
*
self
=
(
smch_si57x_t
*
)
zmalloc
(
sizeof
*
self
);
ASSERT_ALLOC
(
self
,
err_self_alloc
);
self
->
i2c
=
smpr_new
(
SMCH_SI57X_NAME
,
parent
,
SMPR_I2C
,
verbose
);
ASSERT_ALLOC
(
self
->
i2c
,
err_i2c
_alloc
);
self
->
proto
=
smpr_new
(
SMCH_SI57X_NAME
,
parent
,
reg_ops
,
verbose
);
ASSERT_ALLOC
(
self
->
proto
,
err_proto
_alloc
);
/* Initalize the
I2C
protocol */
int
smpr_err
=
smpr_open
(
self
->
i2c
,
base
,
NULL
/* Default parameters are fine */
);
/* Initalize the
PROTO
protocol */
int
smpr_err
=
smpr_open
(
self
->
proto
,
base
,
NULL
/* Default parameters are fine */
);
ASSERT_TEST
(
smpr_err
==
0
,
"Could not initialize SMPR protocol"
,
err_smpr_init
);
self
->
addr
=
addr
;
/* Initialize Si57X parameters */
self
->
fxtal
=
SMCH_SI57X_DFLT_FXTAL
;
self
->
n1
=
SMCH_SI57X_DFLT_N1
;
...
...
@@ -105,8 +102,8 @@ smch_si57x_t * smch_si57x_new (smio_t *parent, uint64_t base, uint32_t addr,
return
self
;
err_smpr_init:
smpr_destroy
(
&
self
->
i2c
);
err_
i2c
_alloc:
smpr_destroy
(
&
self
->
proto
);
err_
proto
_alloc:
free
(
self
);
err_self_alloc:
return
NULL
;
...
...
@@ -120,8 +117,8 @@ smch_err_e smch_si57x_destroy (smch_si57x_t **self_p)
if
(
*
self_p
)
{
smch_si57x_t
*
self
=
*
self_p
;
smpr_release
(
self
->
i2c
);
smpr_destroy
(
&
self
->
i2c
);
smpr_release
(
self
->
proto
);
smpr_destroy
(
&
self
->
proto
);
free
(
self
);
*
self_p
=
NULL
;
}
...
...
@@ -247,10 +244,6 @@ static ssize_t _smch_si57x_write_generic (smch_si57x_t *self, uint8_t addr,
ASSERT_TEST
(
size
<
SI57X_DATA_BYTES_MAX
/* in bytes */
,
"Transaction size too big. Maximum of 32 bytes."
,
err_smpr_write
,
-
1
);
uint32_t
trans_size
=
SI57X_ADDR_TRANS_SIZE
+
size
*
SI57X_DATA_TRANS_SIZE
;
uint32_t
flags
=
SMPR_PROTO_I2C_TRANS_SIZE_FLAGS_W
(
trans_size
)
/* in bits */
|
SMPR_PROTO_I2C_ADDR_FLAGS_W
(
self
->
addr
);
/* SI57X write byte transaction is:
*
*
...
...
@@ -263,20 +256,10 @@ static ssize_t _smch_si57x_write_generic (smch_si57x_t *self, uint8_t addr,
DBE_DEBUG
(
DBG_SM_CH
|
DBG_LVL_TRACE
,
"[sm_ch:si57x_write_8] addr = 0x%02X
\n
"
,
addr
);
/* FIXME? Reduce memcpy calls? We just need this because the address must
* come in the LSBs of data */
uint8_t
__data
[
SI57X_TRANS_SIZE_MAX
/
SMPR_BYTE_2_BIT
];
memcpy
((
uint8_t
*
)
&
__data
,
&
addr
,
SI57X_ADDR_TRANS_SIZE
/
SMPR_BYTE_2_BIT
);
memcpy
((
uint8_t
*
)
&
__data
+
SI57X_ADDR_TRANS_SIZE
/
SMPR_BYTE_2_BIT
,
data
,
size
);
ssize_t
smpr_err
=
smpr_write_block
(
self
->
i2c
,
0
,
ARRAY_SIZE
(
__data
),
(
uint32_t
*
)
&
__data
,
flags
);
ASSERT_TEST
(
smpr_err
>=
0
&&
(
size_t
)
smpr_err
==
trans_size
/
SMPR_BYTE_2_BIT
/* in bytes*/
,
"Could not write data to I2C"
,
err_exit
,
-
1
);
/* Return just the number of data bytes written */
err
=
smpr_err
-
SI57X_ADDR_TRANS_SIZE
/
SMPR_BYTE_2_BIT
;
err
=
smpr_write_block
(
self
->
proto
,
SI57X_ADDR_TRANS_SIZE
/
SMPR_BYTE_2_BIT
,
addr
,
size
,
(
uint32_t
*
)
data
);
ASSERT_TEST
(
err
>=
0
&&
(
size_t
)
err
==
size
/* in bytes*/
,
"Could not write data to PROTO"
,
err_exit
,
-
1
);
err_exit:
err_smpr_write:
...
...
@@ -304,11 +287,6 @@ static ssize_t _smch_si57x_read_generic (smch_si57x_t *self, uint8_t addr, uint8
assert
(
data
);
ssize_t
err
=
-
1
;
uint32_t
trans_size
=
SI57X_ADDR_TRANS_SIZE
;
/* Si571 needs a repeated start between the write and read commands */
uint32_t
flags
=
SMPR_PROTO_I2C_REP_START
|
SMPR_PROTO_I2C_TRANS_SIZE_FLAGS_W
(
trans_size
)
/* in bits */
|
SMPR_PROTO_I2C_ADDR_FLAGS_W
(
self
->
addr
);
/* SI57X read byte transaction is:
*
...
...
@@ -320,23 +298,13 @@ static ssize_t _smch_si57x_read_generic (smch_si57x_t *self, uint8_t addr, uint8
DBE_DEBUG
(
DBG_SM_CH
|
DBG_LVL_TRACE
,
"[sm_ch:si57x_read_8] addr = 0x%02X
\n
"
,
addr
);
ssize_t
smpr_err
=
smpr_write_32
(
self
->
i2c
,
0
,
(
uint32_t
*
)
&
addr
,
flags
);
/* Check if we have written everything */
ASSERT_TEST
(
smpr_err
>=
0
&&
(
size_t
)
smpr_err
==
trans_size
/
SMPR_BYTE_2_BIT
/* in bytes */
,
"Could not write data to I2C"
,
err_exit
,
-
1
);
/* Now, read the data */
trans_size
=
size
*
SI57X_DATA_TRANS_SIZE
;
flags
=
SMPR_PROTO_I2C_TRANS_SIZE_FLAGS_W
(
trans_size
)
/* in bits */
|
SMPR_PROTO_I2C_ADDR_FLAGS_W
(
self
->
addr
);
uint64_t
__addr
=
addr
;
smpr_err
=
smpr_read_block
(
self
->
i2c
,
0
,
size
,
(
uint32_t
*
)
data
,
flags
);
err
=
smpr_read_block
(
self
->
proto
,
SI57X_ADDR_TRANS_SIZE
/
SMPR_BYTE_2_BIT
,
__addr
,
size
,
(
uint32_t
*
)
data
);
/* Check if we have written everything */
ASSERT_TEST
(
smpr_err
>=
0
&&
(
size_t
)
smpr_err
==
trans_size
/
SMPR_BYTE_2_BIT
/* in bytes */
,
"Could not read data from I2C"
,
err_exit
,
-
1
);
err
=
smpr_err
;
ASSERT_TEST
(
err
>=
0
&&
(
size_t
)
err
==
size
/* in bytes */
,
"Could not read data from PROTO"
,
err_exit
,
-
1
);
err_exit:
return
err
;
...
...
@@ -455,34 +423,6 @@ err_exit:
return
err
;
}
/* FIXME: reuse 24AA64 probe function */
ssize_t
smch_si57x_probe_bus
(
smch_si57x_t
*
self
)
{
assert
(
self
);
ssize_t
err
=
0
;
DBE_DEBUG
(
DBG_SM_CH
|
DBG_LVL_TRACE
,
"[sm_ch:si57x_probe_bus] Probing bus ...
\n
"
);
uint32_t
i
;
for
(
i
=
0
;
i
<
128
;
++
i
)
{
uint32_t
flags
=
SMPR_PROTO_I2C_TRANS_SIZE_FLAGS_W
(
8
)
/* in bits */
|
SMPR_PROTO_I2C_ADDR_FLAGS_W
(
i
);
uint32_t
__data
=
0
;
ssize_t
smpr_err
=
smpr_read_32
(
self
->
i2c
,
0
,
&
__data
,
flags
);
if
(
smpr_err
>=
0
)
{
DBE_DEBUG
(
DBG_SM_CH
|
DBG_LVL_INFO
,
"[sm_ch:si57x_probe_bus] "
"Found device at address 0x%02X
\n
"
,
i
);
}
SMCH_SI57X_WAIT_DFLT
;
}
return
err
;
}
/******************************* Helper Functions ****************************/
static
smch_err_e
_smch_si57x_wait_new_freq
(
smch_si57x_t
*
self
)
...
...
src/sm_io/modules/acq/sm_io_acq_exp.c
View file @
acbe7be1
...
...
@@ -114,7 +114,7 @@ static int _acq_data_acquire (void *owner, void *args, void *ret)
return
-
ACQ_NUM_CHAN_OOR
;
}
/* number of samples required is out of the maximum limit. Maixmum number of samples
/* number of samples required is out of the maximum limit. Maixmum number of samples
* in multishot mode is simply the maximum number of samples of the DPRAM. The DPRAM
* size is calculated to fit the largest sample in the design, so we are safe. */
uint32_t
max_samples_multishot
=
ACQ_CORE_MULTISHOT_MEM_SIZE
;
...
...
@@ -159,15 +159,19 @@ static int _acq_data_acquire (void *owner, void *args, void *ret)
"Number of shots = %u
\n
"
,
acq_core_shots
);
smio_thsafe_client_write_32
(
self
,
ACQ_CORE_REG_SHOTS
,
&
acq_core_shots
);
uint32_t
trigger
=
0
;
_acq_get_trigger_type
(
self
,
&
trigger
);
/* FIXME FPGA Firmware requires number of samples to be divisible by
* acquisition channel sample size */
uint32_t
samples_alignment
=
DDR3_PAYLOAD_SIZE
/
acq
->
acq_buf
[
chan
].
sample_size
;
uint32_t
num_samples_pre_aligned
=
num_samples_pre
+
samples_alignment
-
(
num_samples_pre
%
samples_alignment
);
uint32_t
num_samples_post_aligned
=
(
num_samples_post
==
0
)
?
0
:
num_samples_post
+
samples_alignment
-
(
num_samples_post
%
samples_alignment
);
uint32_t
num_samples_pre_aligned
=
hutils_align_value
(
num_samples_pre
,
samples_alignment
);
/* FIXME. Curently, the FPGA gateware does not support triggered acquisitions with
* post_samples = 0. See github lnls-bpm/bpm-gw#62 */
uint32_t
num_samples_post_aligned
=
(
num_samples_post
==
0
&&
trigger
!=
TYPE_ACQ_CORE_SKIP
)
?
samples_alignment
:
hutils_align_value
(
num_samples_post
,
samples_alignment
);
/* Set the parameters: number of samples of this channel */
acq
->
acq_params
[
chan
].
num_samples_pre
=
num_samples_pre_aligned
;
...
...
@@ -401,8 +405,8 @@ static int _acq_get_data_block (void *owner, void *args, void *ret)
* sample_size
* */
/* First step if to get the trigger address from the channel.
* Even on skip trigger mode, this will contain the address after
/* First step if to get the trigger address from the channel.
* Even on skip trigger mode, this will contain the address after
* the last valid sample (end of acquisition address) */
uint32_t
acq_core_trig_addr
=
acq
->
acq_params
[
chan
].
trig_addr
;
...
...
src/sm_io/modules/fmc130m_4ch/sm_io_fmc130m_4ch_core.c
View file @
acbe7be1
...
...
@@ -55,24 +55,35 @@ smio_fmc130m_4ch_t * smio_fmc130m_4ch_new (smio_t *parent)
DBE_DEBUG
(
DBG_SM_IO
|
DBG_LVL_TRACE
,
"[sm_io:fmc130m_4ch_core] PCA9547 initializing, "
" addr: 0x%08X, Inst ID: %u
\n
"
,
fmc130m_4ch_pca9547_addr
[
inst_id
],
inst_id
);
/* Create I2C protocol for pca9547 chip */
self
->
smpr_i2c_pca9547
=
smpr_i2c_new
(
0
,
fmc130m_4ch_pca9547_addr
[
inst_id
]);
ASSERT_ALLOC
(
self
->
smpr_i2c_pca9547
,
err_smpr_i2c_pca9547_alloc
);
/* FPGA I2C Switch */
self
->
smch_pca9547
=
smch_pca9547_new
(
parent
,
FMC_130M_EEPROM_I2C_OFFS
,
fmc130m_4ch_pca9547_addr
[
inst_id
]
,
0
);
smpr_i2c_get_ops
(
self
->
smpr_i2c_pca9547
)
,
0
);
ASSERT_ALLOC
(
self
->
smch_pca9547
,
err_smch_pca9547_alloc
);
/* Enable default I2C channel */
smch_pca9547_en_chan
(
self
->
smch_pca9547
,
FMC130M_4CH_DFLT_PCA9547_CFG
);
}
else
{
self
->
smpr_i2c_pca9547
=
NULL
;
self
->
smch_pca9547
=
NULL
;
}
DBE_DEBUG
(
DBG_SM_IO
|
DBG_LVL_TRACE
,
"[sm_io:fmc130m_4ch_core] 24AA64 initializing, "
"addr: 0x%08X, Inst ID: %u
\n
"
,
fmc130m_4ch_24aa64_addr
[
inst_id
],
inst_id
);
/* Create I2C protocol for 24aa64 chip */
self
->
smpr_i2c_24aa64
=
smpr_i2c_new
(
0
,
fmc130m_4ch_24aa64_addr
[
inst_id
]);
ASSERT_ALLOC
(
self
->
smpr_i2c_24aa64
,
err_smpr_i2c_24aa64_alloc
);
/* EEPROM is on the same I2C bus as the LM75A */
self
->
smch_24aa64
=
smch_24aa64_new
(
parent
,
FMC_130M_LM75A_I2C_OFFS
,
fmc130m_4ch_24aa64_addr
[
inst_id
]
,
0
);
smpr_i2c_get_ops
(
self
->
smpr_i2c_24aa64
)
,
0
);
ASSERT_ALLOC
(
self
->
smch_24aa64
,
err_smch_24aa64_alloc
);
uint32_t
data_24aa64
;
...
...
@@ -111,11 +122,21 @@ smio_fmc130m_4ch_t * smio_fmc130m_4ch_new (smio_t *parent)
return
self
;
#ifdef __FMC130M_4CH_EEPROM_PROGRAM__
err_smch_ad9510_alloc:
smch_24aa64_destroy
(
&
self
->
smch_24aa64
);
#endif
err_smch_24aa64_alloc:
smpr_i2c_destroy
(
&
self
->
smpr_i2c_24aa64
);
err_smpr_i2c_24aa64_alloc:
if
(
self
->
smch_pca9547
!=
NULL
)
{
smch_pca9547_destroy
(
&
self
->
smch_pca9547
);
}
err_smch_pca9547_alloc:
if
(
self
->
smpr_i2c_pca9547
!=
NULL
)
{
smpr_i2c_destroy
(
&
self
->
smpr_i2c_pca9547
);
}
err_smpr_i2c_pca9547_alloc:
err_num_fmc130m_4ch_smios:
free
(
self
);
err_self_alloc:
...
...
@@ -131,10 +152,14 @@ smio_err_e smio_fmc130m_4ch_destroy (smio_fmc130m_4ch_t **self_p)
smio_fmc130m_4ch_t
*
self
=
*
self_p
;
smch_24aa64_destroy
(
&
self
->
smch_24aa64
);
smpr_i2c_destroy
(
&
self
->
smpr_i2c_24aa64
);
if
(
self
->
smch_pca9547
!=
NULL
)
{
smch_pca9547_destroy
(
&
self
->
smch_pca9547
);
}
if
(
self
->
smpr_i2c_pca9547
!=
NULL
)
{
smpr_i2c_destroy
(
&
self
->
smpr_i2c_pca9547
);
}
free
(
self
);
*
self_p
=
NULL
;
...
...
src/sm_io/modules/fmc130m_4ch/sm_io_fmc130m_4ch_core.h
View file @
acbe7be1
...
...
@@ -28,7 +28,9 @@ typedef enum {
typedef
struct
{
fmc130m_4ch_type_e
type
;
/* FMC130M_4CH type */
smpr_i2c_t
*
smpr_i2c_24aa64
;
/* I2C protocol handler */
smch_24aa64_t
*
smch_24aa64
;
/* 24AA64 chip handler */
smpr_i2c_t
*
smpr_i2c_pca9547
;
/* I2C protocol handler */
smch_pca9547_t
*
smch_pca9547
;
/* FPGA I2C Switch */
}
smio_fmc130m_4ch_t
;
...
...
src/sm_io/modules/fmc250m_4ch/sm_io_fmc250m_4ch_core.c
View file @
acbe7be1
...
...
@@ -57,8 +57,11 @@ smio_fmc250m_4ch_t * smio_fmc250m_4ch_new (smio_t *parent)
inst_id
);
/* FPGA I2C Switch */
#if 0
self->smpr_i2c_pca9547 = smpr_i2c_new (0, fmc250m_4ch_pca9547_addr[inst_id]);
ASSERT_ALLOC(self->smpr_i2c_pca9547, err_smpr_i2c_pca9547_alloc);
self->smch_pca9547 = smch_pca9547_new (parent, FMC_250M_EEPROM_I2C_OFFS,
fmc250m_4ch_pca9547_addr[inst_id]
, 0);
smpr_i2c_get_ops (self->smpr_i2c_pca9547)
, 0);
ASSERT_ALLOC(self->smch_pca9547, err_smch_pca9547_alloc);
/* Enable default I2C channel */
...
...
@@ -66,6 +69,7 @@ smio_fmc250m_4ch_t * smio_fmc250m_4ch_new (smio_t *parent)
}
else {
#endif
self
->
smpr_i2c_pca9547
=
NULL
;
self
->
smch_pca9547
=
NULL
;
}
...
...
@@ -75,9 +79,15 @@ smio_fmc250m_4ch_t * smio_fmc250m_4ch_new (smio_t *parent)
DBE_DEBUG
(
DBG_SM_IO
|
DBG_LVL_INFO
,
"[sm_io:fmc250m_4ch_core] pre new EEPROM 24AA64 data: 0x%08X
\n
"
,
0
);
#if 0
/* Create I2C protocol for 24aa64 chip */
self->smpr_i2c_24aa64 = smpr_i2c_new (0, fmc250m_4ch_24aa64_addr[inst_id]);
ASSERT_ALLOC(self->smpr_i2c_24aa64, err_smpr_i2c_24aa64_alloc);
/* EEPROM is on the same I2C bus as the LM75A */
self->smch_24aa64 = smch_24aa64_new (parent, FMC_250M_EEPROM_I2C_OFFS,
fmc250m_4ch_24aa64_addr[inst_id], 0);
self->smch_24aa64 = smch_24aa64_new (parent, FMC_250M_LM75A_I2C_OFFS,
smpr_i2c_get_ops (self->smpr_i2c_24aa64), 0);
ASSERT_ALLOC(self->smch_24aa64, err_smch_24aa64_alloc);
DBE_DEBUG (DBG_SM_IO | DBG_LVL_INFO,
"[sm_io:fmc250m_4ch_core] post new 24AA64 data: 0x%08X\n", 0);
ASSERT_ALLOC(self->smch_24aa64, err_smch_24aa64_alloc);
...
...
@@ -120,17 +130,21 @@ smio_fmc250m_4ch_t * smio_fmc250m_4ch_new (smio_t *parent)
_smio_fmc250m_4ch_set_type
(
self
,
0x0
);
/* FIXME: We need to be sure that, if the board is ACTIVE, the FMC_ACTIVE_CLK
* component has been sucseddfully initialized so that the ADCs has clock.
* Otherwise, we won't be able to RESET the ADCs, leading to undefined
* component has been sucseddfully initialized so that the ADCs has clock.
* Otherwise, we won't be able to RESET the ADCs, leading to undefined
* behavior */
sleep
(
5
);
/* Setup ISLA216P ADC SPI communication */
uint32_t
i
;
for
(
i
=
0
;
i
<
NUM_FMC250M_4CH_ISLA216P
;
++
i
)
{
/* Create SPI protocol for ISLA216P chips */
self
->
smpr_spi_isla216p_adc
[
i
]
=
smpr_spi_new
(
fmc250m_4ch_isla216p_addr
[
inst_id
][
i
],
1
/* addr_msb */
);
ASSERT_ALLOC
(
self
->
smpr_spi_isla216p_adc
[
i
],
err_smpr_spi_isla216p_adc_alloc
);
self
->
smch_isla216p_adc
[
i
]
=
NULL
;
self
->
smch_isla216p_adc
[
i
]
=
smch_isla216p_new
(
parent
,
FMC_250M_ISLA216P_SPI_OFFS
,
fmc250m_4ch_isla216p_addr
[
inst_id
][
i
]
,
0
);
smpr_spi_get_ops
(
self
->
smpr_spi_isla216p_adc
[
i
])
,
0
);
ASSERT_ALLOC
(
self
->
smch_isla216p_adc
[
i
],
err_smch_isla216p_adc
);
uint8_t
chipid
=
0
;
...
...
@@ -146,19 +160,31 @@ smio_fmc250m_4ch_t * smio_fmc250m_4ch_new (smio_t *parent)
return
self
;
err_smch_isla216p_adc:
for
(
i
=
0
;
i
<
NUM_FMC250M_4CH_ISLA216P
;
++
i
)
{
smch_isla216p_destroy
(
&
self
->
smch_isla216p_adc
[
i
]);
}
err_smpr_spi_isla216p_adc_alloc:
for
(
i
=
0
;
i
<
NUM_FMC250M_4CH_ISLA216P
;
++
i
)
{
smpr_spi_destroy
(
&
self
->
smpr_spi_isla216p_adc
[
i
]);
}
#if 0
#ifdef __FMC250M_4CH_EEPROM_PROGRAM__
err_smch_ad9510_alloc:
smch_24aa64_destroy (&self->smch_24aa64);
#endif
err_smch_24aa64_alloc:
smpr_i2c_destroy (&self->smpr_i2c_24aa64);
err_smpr_i2c_24aa64_alloc:
if (self->smch_pca9547 != NULL) {
smch_pca9547_destroy (&self->smch_pca9547);
}
#endif
#if 0
err_smch_pca9547_alloc:
#endif
err_smch_isla216p_adc:
for
(
i
=
0
;
i
<
NUM_FMC250M_4CH_ISLA216P
;
++
i
)
{
smch_isla216p_destroy
(
&
self
->
smch_isla216p_adc
[
i
]);
if (self->smpr_i2c_pca9547 != NULL) {
smpr_i2c_destroy (&self->smpr_i2c_pca9547);
}
err_smpr_i2c_pca9547_alloc:
#endif
err_num_fmc250m_4ch_smios:
free
(
self
);
err_self_alloc:
...
...
@@ -173,16 +199,23 @@ smio_err_e smio_fmc250m_4ch_destroy (smio_fmc250m_4ch_t **self_p)
if
(
*
self_p
)
{
smio_fmc250m_4ch_t
*
self
=
*
self_p
;
/* Destroy all ISLA216P instances */
uint32_t
i
;
for
(
i
=
0
;
i
<
NUM_FMC250M_4CH_ISLA216P
;
++
i
)
{
smch_isla216p_destroy
(
&
self
->
smch_isla216p_adc
[
i
]);
}
for
(
i
=
0
;
i
<
NUM_FMC250M_4CH_ISLA216P
;
++
i
)
{
smpr_spi_destroy
(
&
self
->
smpr_spi_isla216p_adc
[
i
]);
}
smch_24aa64_destroy
(
&
self
->
smch_24aa64
);
smpr_i2c_destroy
(
&
self
->
smpr_i2c_24aa64
);
if
(
self
->
smch_pca9547
!=
NULL
)
{
smch_pca9547_destroy
(
&
self
->
smch_pca9547
);
}
/* Destroy all ISLA216P instances */
uint32_t
i
;
for
(
i
=
0
;
i
<
NUM_FMC250M_4CH_ISLA216P
;
++
i
)
{
smch_isla216p_destroy
(
&
self
->
smch_isla216p_adc
[
i
]);
if
(
self
->
smpr_i2c_pca9547
!=
NULL
)
{
smpr_i2c_destroy
(
&
self
->
smpr_i2c_pca9547
);
}
free
(
self
);
...
...
src/sm_io/modules/fmc250m_4ch/sm_io_fmc250m_4ch_core.h
View file @
acbe7be1
...
...
@@ -33,8 +33,11 @@ typedef struct {
#if 0
smch_amc7823_t *smch_amc7823; /* AMC7823 chip handler */
#endif
smpr_spi_t
*
smpr_spi_isla216p_adc
[
NUM_FMC250M_4CH_ISLA216P
];
/* SPI protocol handler */
smch_isla216p_t
*
smch_isla216p_adc
[
NUM_FMC250M_4CH_ISLA216P
];
/* ISLA216P chip handlers */
smpr_i2c_t
*
smpr_i2c_24aa64
;
/* I2C protocol handler */
smch_24aa64_t
*
smch_24aa64
;
/* 24AA64 chip handler */
smpr_i2c_t
*
smpr_i2c_pca9547
;
/* I2C protocol handler */
smch_pca9547_t
*
smch_pca9547
;
/* FPGA I2C Switch */
}
smio_fmc250m_4ch_t
;
...
...
src/sm_io/modules/fmc_active_clk/sm_io_fmc_active_clk_core.c
View file @
acbe7be1
...
...
@@ -45,24 +45,36 @@ smio_fmc_active_clk_t * smio_fmc_active_clk_new (smio_t *parent)
DBE_DEBUG
(
DBG_SM_IO
|
DBG_LVL_TRACE
,
"[sm_io:fmc_active_clk_core] AD9510 initializing, "
"addr: 0x%08X, Inst ID: %u
\n
"
,
fmc_active_clk_ad9510_addr
,
inst_id
);
/* Create SPI protocol for AD9510 chips */
self
->
smpr_spi_ad9510
=
smpr_spi_new
(
fmc_active_clk_ad9510_addr
,
1
/* addr_msb */
);
ASSERT_ALLOC
(
self
->
smpr_spi_ad9510
,
err_smpr_spi_ad9510_alloc
);
self
->
smch_ad9510
=
smch_ad9510_new
(
parent
,
FMC_ACTIVE_CLK_AD9510_SPI_OFFS
,
fmc_active_clk_ad9510_addr
,
0
);
smpr_spi_get_ops
(
self
->
smpr_spi_ad9510
)
,
0
);
ASSERT_ALLOC
(
self
->
smch_ad9510
,
err_smch_ad9510_alloc
);
DBE_DEBUG
(
DBG_SM_IO
|
DBG_LVL_TRACE
,
"[sm_io:fmc_active_clk_core] SI571 initializing, "
"addr: 0x%08X, Inst ID: %u
\n
"
,
fmc_active_clk_si571_addr
,
inst_id
);
/* Create I2C protocol for Si571 chips */
self
->
smpr_i2c_si571
=
smpr_i2c_new
(
0
,
fmc_active_clk_si571_addr
);
ASSERT_ALLOC
(
self
->
smpr_i2c_si571
,
err_smpr_i2c_si571_alloc
);
self
->
smch_si571
=
smch_si57x_new
(
parent
,
FMC_ACTIVE_CLK_SI571_I2C_OFFS
,
fmc_active_clk_si571_addr
,
0
);
smpr_i2c_get_ops
(
self
->
smpr_i2c_si571
)
,
0
);
ASSERT_ALLOC
(
self
->
smch_si571
,
err_smch_si571_alloc
);
return
self
;
err_smch_si571_alloc:
if
(
self
->
smch_ad9510
!=
NULL
)
{
smch_ad9510_destroy
(
&
self
->
smch_ad9510
);
}
smpr_i2c_destroy
(
&
self
->
smpr_i2c_si571
);
err_smpr_i2c_si571_alloc:
smch_ad9510_destroy
(
&
self
->
smch_ad9510
);
err_smch_ad9510_alloc:
smpr_spi_destroy
(
&
self
->
smpr_spi_ad9510
);
err_smpr_spi_ad9510_alloc:
free
(
self
);
err_self_alloc:
return
NULL
;
...
...
@@ -77,7 +89,10 @@ smio_err_e smio_fmc_active_clk_destroy (smio_fmc_active_clk_t **self_p)
smio_fmc_active_clk_t
*
self
=
*
self_p
;
smch_si57x_destroy
(
&
self
->
smch_si571
);
smpr_i2c_destroy
(
&
self
->
smpr_i2c_si571
);
smch_ad9510_destroy
(
&
self
->
smch_ad9510
);
smpr_spi_destroy
(
&
self
->
smpr_spi_ad9510
);
free
(
self
);
*
self_p
=
NULL
;
}
...
...
src/sm_io/modules/fmc_active_clk/sm_io_fmc_active_clk_core.h
View file @
acbe7be1
...
...
@@ -12,7 +12,9 @@
#define SMIO_SI57X_HANDLER(smio_handler) ((smch_si57x_t *) smio_handler->smch_si571)
typedef
struct
{
smpr_spi_t
*
smpr_spi_ad9510
;
/* SPI protocol handler */
smch_ad9510_t
*
smch_ad9510
;
/* AD9510 chip handler */
smpr_i2c_t
*
smpr_i2c_si571
;
/* I2C protocol handler */
smch_si57x_t
*
smch_si571
;
/* SI571 chip handler */
}
smio_fmc_active_clk_t
;
...
...
src/sm_io/modules/rffe/sm_io_rffe_core.c
View file @
acbe7be1
...
...
@@ -35,17 +35,21 @@
/* Creates a new instance of Device Information */
smio_rffe_t
*
smio_rffe_new
(
smio_t
*
parent
)
{
(
void
)
parent
;
smio_rffe_t
*
self
=
(
smio_rffe_t
*
)
zmalloc
(
sizeof
*
self
);
ASSERT_ALLOC
(
self
,
err_self_alloc
);
self
->
ctl
=
smch_rffe_new
(
parent
,
0
);
ASSERT_ALLOC
(
self
->
ctl
,
err_rffe_alloc
);
/* Create BSMP protocol for RFFE */
self
->
smpr_ctl
=
smpr_bsmp_new
();
ASSERT_ALLOC
(
self
->
smpr_ctl
,
err_smpr_ctl_alloc
);
self
->
smch_ctl
=
smch_rffe_new
(
parent
,
smpr_bsmp_get_ops
(
self
->
smpr_ctl
),
0
);
ASSERT_ALLOC
(
self
->
smch_ctl
,
err_rffe_alloc
);
return
self
;
err_rffe_alloc:
smpr_bsmp_destroy
(
&
self
->
smpr_ctl
);
err_smpr_ctl_alloc:
free
(
self
);
err_self_alloc:
return
NULL
;
...
...
@@ -59,7 +63,8 @@ smio_err_e smio_rffe_destroy (smio_rffe_t **self_p)
if
(
*
self_p
)
{
smio_rffe_t
*
self
=
*
self_p
;
smch_rffe_destroy
(
&
self
->
ctl
);
smpr_bsmp_destroy
(
&
self
->
smpr_ctl
);
smch_rffe_destroy
(
&
self
->
smch_ctl
);
free
(
self
);
*
self_p
=
NULL
;
}
...
...
src/sm_io/modules/rffe/sm_io_rffe_core.h
View file @
acbe7be1
...
...
@@ -8,10 +8,11 @@
#ifndef _SM_IO_RFFE_CORE_H_
#define _SM_IO_RFFE_CORE_H_
#define SMIO_CTL_HANDLER(smio_handler) (smio_handler->ctl)
#define SMIO_CTL_HANDLER(smio_handler) (smio_handler->
smch_
ctl)
typedef
struct
{
smch_rffe_t
*
ctl
;
smpr_bsmp_t
*
smpr_ctl
;
smch_rffe_t
*
smch_ctl
;
}
smio_rffe_t
;
/***************** Our methods *****************/
...
...
src/sm_io/protocols/ops/sm_pr_bsmp.c
View file @
acbe7be1
...
...
@@ -51,6 +51,12 @@ typedef struct {
struct
bsmp_group_list
*
groups_list
;
/* BSMP groups handler */
}
smpr_proto_bsmp_t
;
/* Protocol object specification */
struct
_smpr_bsmp_t
{
/* Must be located first */
smpr_proto_ops_t
proto_ops
;
/* BSMP protocol operations */
};
static
smpr_err_e
_smpr_proto_bsmp_get_handlers
(
smpr_t
*
self
);
static
int
_smpr_proto_bsmp_send
(
uint8_t
*
data
,
uint32_t
*
count
);
static
int
_smpr_proto_bsmp_recv
(
uint8_t
*
data
,
uint32_t
*
count
);
...
...
@@ -95,7 +101,7 @@ static smpr_err_e smpr_proto_bsmp_destroy (smpr_proto_bsmp_t **self_p)
/************ smpr_proto_ops_bsmp Implementation **********/
/* Open BSMP protocol */
int
bsmp_open
(
smpr_t
*
self
,
uint64_t
base
,
void
*
args
)
static
int
bsmp_open
(
smpr_t
*
self
,
uint64_t
base
,
void
*
args
)
{
(
void
)
args
;
assert
(
self
);
...
...
@@ -146,7 +152,7 @@ err_proto_handler_alloc:
}
/* Release BSMP protocol device */
int
bsmp_release
(
smpr_t
*
self
)
static
int
bsmp_release
(
smpr_t
*
self
)
{
assert
(
self
);
...
...
@@ -482,7 +488,8 @@ err_packet_header:
return
err
;
}
const
smpr_proto_ops_t
smpr_proto_ops_bsmp
=
{
static
const
smpr_proto_ops_t
smpr_proto_ops_bsmp
=
{
.
proto_name
=
"BSMP"
,
/* Protocol name */
.
proto_open
=
bsmp_open
,
/* Open device */
.
proto_release
=
bsmp_release
,
/* Release device */
.
proto_read_16
=
NULL
,
/* Read 16-bit data */
...
...
@@ -500,3 +507,41 @@ const smpr_proto_ops_t smpr_proto_ops_bsmp = {
.
proto_write_dma
=
NULL
/* Write arbitrary block size data via DMA,
parameter size in bytes */
};
/************ Our methods implementation **********/
/* Creates a new instance of the proto_bsmp */
smpr_bsmp_t
*
smpr_bsmp_new
()
{
smpr_bsmp_t
*
self
=
(
smpr_bsmp_t
*
)
zmalloc
(
sizeof
*
self
);
ASSERT_ALLOC
(
self
,
err_smpr_bsmp_alloc
);
/* copy BSMP operations */
self
->
proto_ops
=
smpr_proto_ops_bsmp
;
return
self
;
err_smpr_bsmp_alloc:
return
NULL
;
}
/* Destroy an instance of the bsmp */
smpr_err_e
smpr_bsmp_destroy
(
smpr_bsmp_t
**
self_p
)
{
assert
(
self_p
);
if
(
*
self_p
)
{
smpr_bsmp_t
*
self
=
*
self_p
;
free
(
self
);
self_p
=
NULL
;
}
return
SMPR_SUCCESS
;
}
const
smpr_proto_ops_t
*
smpr_bsmp_get_ops
(
smpr_bsmp_t
*
self
)
{
assert
(
self
);
return
&
self
->
proto_ops
;
}
src/sm_io/protocols/ops/sm_pr_i2c.c
View file @
acbe7be1
This diff is collapsed.
Click to expand it.
src/sm_io/protocols/ops/sm_pr_spi.c
View file @
acbe7be1
This diff is collapsed.
Click to expand it.
src/sm_io/protocols/sm_pr.c
View file @
acbe7be1
...
...
@@ -31,7 +31,6 @@
smpr_err_str (err_type))
struct
_smpr_t
{
smpr_type_e
type
;
/* Protocol type (SPI, I2C, 1-wire, GPIO, Bypass) */
void
*
proto_handler
;
/* Generic pointer to a protocol handler. This
must be cast to a specific type by the
specific protocol functions */
...
...
@@ -45,12 +44,13 @@ struct _smpr_t {
const
smpr_proto_ops_t
*
ops
;
};
static
smpr_err_e
_smpr_register_proto_ops
(
smpr_type_e
type
,
const
smpr_proto_ops_t
*
*
ops
);
static
smpr_err_e
_smpr_register_proto_ops
(
const
smpr_proto_ops_t
**
ops
,
const
smpr_proto_ops_t
*
reg_
ops
);
static
smpr_err_e
_smpr_unregister_proto_ops
(
const
smpr_proto_ops_t
**
ops
);
/* Creates a new instance of the Low-level I/O */
smpr_t
*
smpr_new
(
char
*
name
,
smio_t
*
parent
,
smpr_type_e
type
,
int
verbose
)
smpr_t
*
smpr_new
(
char
*
name
,
smio_t
*
parent
,
const
smpr_proto_ops_t
*
reg_ops
,
int
verbose
)
{
assert
(
name
);
assert
(
parent
);
...
...
@@ -58,8 +58,7 @@ smpr_t * smpr_new (char *name, smio_t *parent, smpr_type_e type, int verbose)
smpr_t
*
self
=
(
smpr_t
*
)
zmalloc
(
sizeof
*
self
);
ASSERT_ALLOC
(
self
,
err_self_alloc
);
/* Initialize Protocol type */
self
->
type
=
type
;
/* Initialize Protocol */
self
->
proto_handler
=
NULL
;
/* This is set by the specific protocol functions */
self
->
name
=
strdup
(
name
);
ASSERT_ALLOC
(
self
->
name
,
err_name_alloc
);
...
...
@@ -71,7 +70,7 @@ smpr_t * smpr_new (char *name, smio_t *parent, smpr_type_e type, int verbose)
err_parent_null
);
/* Attach protocol operation to instance of smpr */
smpr_err_e
err
=
_smpr_register_proto_ops
(
type
,
&
self
->
ops
);
smpr_err_e
err
=
_smpr_register_proto_ops
(
&
self
->
ops
,
reg_
ops
);
ASSERT_TEST
(
err
==
SMPR_SUCCESS
,
"Could not register SMPR operation"
,
err_register_ops
);
...
...
@@ -148,41 +147,29 @@ smio_t *smpr_get_parent (smpr_t *self)
return
self
->
parent
;
}
/**************** Helper Functions ***************/
const
smpr_proto_ops_t
*
smpr_get_ops
(
smpr_t
*
self
)
{
assert
(
self
);
return
self
->
ops
;
}
/* Register Specific Protocol operations to smpr instance. Helper function */
static
smpr_err_e
_smpr_register_proto_ops
(
smpr_type_e
type
,
const
smpr_proto_ops_t
**
ops
)
const
char
*
smpr_get_ops_name
(
smpr_t
*
self
)
{
switch
(
type
)
{
case
SMPR_SPI
:
*
ops
=
&
smpr_proto_ops_spi
;
break
;
case
SMPR_I2C
:
*
ops
=
&
smpr_proto_ops_i2c
;
break
;
case
SMPR_BSMP
:
*
ops
=
&
smpr_proto_ops_bsmp
;
break
;
/*case SMPR_1WIRE:
*ops = &smpr_proto_ops_1wire;
break;
case SMPR_GPIO:
*ops = &smpr_proto_ops_gpio;
break;
case SMPR_BYPASS:
*ops = &smpr_proto_ops_bypass;
break;*/
default:
*
ops
=
NULL
;
return
SMPR_ERR_INV_FUNC_PARAM
;
assert
(
self
);
if
(
self
->
ops
==
NULL
)
{
return
NULL
;
}
return
self
->
ops
->
proto_name
;
}
/**************** Helper Functions ***************/
/* Register Specific Protocol operations to smpr instance. Helper function */
static
smpr_err_e
_smpr_register_proto_ops
(
const
smpr_proto_ops_t
**
ops
,
const
smpr_proto_ops_t
*
reg_ops
)
{
*
ops
=
reg_ops
;
DBE_DEBUG
(
DBG_SM_PR
|
DBG_LVL_INFO
,
"[sm_pr] Proto ops set
\n
"
);
return
SMPR_SUCCESS
;
}
...
...
@@ -225,33 +212,33 @@ int smpr_release (smpr_t *self)
SMPR_FUNC_WRAPPER
(
proto_release
)
/**** Read data from device ****/
ssize_t
smpr_read_16
(
smpr_t
*
self
,
uint64_t
offs
,
uint16_t
*
data
,
uint32_t
flags
)
SMPR_FUNC_WRAPPER
(
proto_read_16
,
offs
,
data
,
flags
)
ssize_t
smpr_read_32
(
smpr_t
*
self
,
uint64_t
offs
,
uint32_t
*
data
,
uint32_t
flags
)
SMPR_FUNC_WRAPPER
(
proto_read_32
,
offs
,
data
,
flags
)
ssize_t
smpr_read_64
(
smpr_t
*
self
,
uint64_t
offs
,
uint64_t
*
data
,
uint32_t
flags
)
SMPR_FUNC_WRAPPER
(
proto_read_64
,
offs
,
data
,
flags
)
ssize_t
smpr_read_16
(
smpr_t
*
self
,
size_t
size_offs
,
uint64_t
offs
,
uint16_t
*
data
)
SMPR_FUNC_WRAPPER
(
proto_read_16
,
size_offs
,
offs
,
data
)
ssize_t
smpr_read_32
(
smpr_t
*
self
,
size_t
size_offs
,
uint64_t
offs
,
uint32_t
*
data
)
SMPR_FUNC_WRAPPER
(
proto_read_32
,
size_offs
,
offs
,
data
)
ssize_t
smpr_read_64
(
smpr_t
*
self
,
size_t
size_offs
,
uint64_t
offs
,
uint64_t
*
data
)
SMPR_FUNC_WRAPPER
(
proto_read_64
,
size_offs
,
offs
,
data
)
/**** Write data to device ****/
ssize_t
smpr_write_16
(
smpr_t
*
self
,
uint64_t
offs
,
const
uint16_t
*
data
,
uint32_t
flags
)
SMPR_FUNC_WRAPPER
(
proto_write_16
,
offs
,
data
,
flags
)
ssize_t
smpr_write_32
(
smpr_t
*
self
,
uint64_t
offs
,
const
uint32_t
*
data
,
uint32_t
flags
)
SMPR_FUNC_WRAPPER
(
proto_write_32
,
offs
,
data
,
flags
)
ssize_t
smpr_write_64
(
smpr_t
*
self
,
uint64_t
offs
,
const
uint64_t
*
data
,
uint32_t
flags
)
SMPR_FUNC_WRAPPER
(
proto_write_64
,
offs
,
data
,
flags
)
ssize_t
smpr_write_16
(
smpr_t
*
self
,
size_t
size_offs
,
uint64_t
offs
,
const
uint16_t
*
data
)
SMPR_FUNC_WRAPPER
(
proto_write_16
,
size_offs
,
offs
,
data
)
ssize_t
smpr_write_32
(
smpr_t
*
self
,
size_t
size_offs
,
uint64_t
offs
,
const
uint32_t
*
data
)
SMPR_FUNC_WRAPPER
(
proto_write_32
,
size_offs
,
offs
,
data
)
ssize_t
smpr_write_64
(
smpr_t
*
self
,
size_t
size_offs
,
uint64_t
offs
,
const
uint64_t
*
data
)
SMPR_FUNC_WRAPPER
(
proto_write_64
,
size_offs
,
offs
,
data
)
/**** Read data block from device function pointer, size in bytes ****/
ssize_t
smpr_read_block
(
smpr_t
*
self
,
uint64_t
offs
,
size_t
size
,
uint32_t
*
data
,
uint32_t
flags
)
SMPR_FUNC_WRAPPER
(
proto_read_block
,
offs
,
size
,
data
,
flags
)
ssize_t
smpr_read_block
(
smpr_t
*
self
,
size_t
size_offs
,
uint64_t
offs
,
size_t
size
,
uint32_t
*
data
)
SMPR_FUNC_WRAPPER
(
proto_read_block
,
size_offs
,
offs
,
size
,
data
)
/**** Write data block from device function pointer, size in bytes ****/
ssize_t
smpr_write_block
(
smpr_t
*
self
,
uint64_t
offs
,
size_t
size
,
uint32_t
*
data
,
uint32_t
flags
)
SMPR_FUNC_WRAPPER
(
proto_write_block
,
offs
,
size
,
data
,
flags
)
ssize_t
smpr_write_block
(
smpr_t
*
self
,
size_t
size_offs
,
uint64_t
offs
,
size_t
size
,
uint32_t
*
data
)
SMPR_FUNC_WRAPPER
(
proto_write_block
,
size_offs
,
offs
,
size
,
data
)
/**** Read data block from via DMA from protocol function pointer, size in bytes ****/
ssize_t
smpr_read_dma
(
smpr_t
*
self
,
uint64_t
offs
,
size_t
size
,
uint32_t
*
data
,
uint32_t
flags
)
SMPR_FUNC_WRAPPER
(
proto_read_dma
,
offs
,
size
,
data
,
flags
)
ssize_t
smpr_read_dma
(
smpr_t
*
self
,
size_t
size_offs
,
uint64_t
offs
,
size_t
size
,
uint32_t
*
data
)
SMPR_FUNC_WRAPPER
(
proto_read_dma
,
size_offs
,
offs
,
size
,
data
)
/**** Write data block via DMA from protocol function pointer, size in bytes ****/
ssize_t
smpr_write_dma
(
smpr_t
*
self
,
uint64_t
offs
,
size_t
size
,
uint32_t
*
data
,
uint32_t
flags
)
SMPR_FUNC_WRAPPER
(
proto_write_dma
,
offs
,
size
,
data
,
flags
)
ssize_t
smpr_write_dma
(
smpr_t
*
self
,
size_t
size_offs
,
uint64_t
offs
,
size_t
size
,
uint32_t
*
data
)
SMPR_FUNC_WRAPPER
(
proto_write_dma
,
size_offs
,
offs
,
size
,
data
)
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